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nb/intel/ironlake: Add QPI Physical Layer registers

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Tested with BUILD_TIMELESS=1, Packard Bell MS2290 does not change.

Change-Id: I44db564c757647f493e92d35602178ef8b722517
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43738
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Angel Pons
2020-07-22 18:17:33 +02:00
committed by Patrick Georgi
parent 10993c4ad4
commit a457e35237
2 changed files with 23 additions and 13 deletions
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10
src/northbridge/intel/ironlake/ironlake.h
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@@ -75,6 +75,16 @@
*/
#define QPI_PHY_0 PCI_DEV(QUICKPATH_BUS, 2, 1)
#define QPI_PLL_STATUS 0x50
#define QPI_PLL_RATIO 0x54
#define QPI_PHY_CAPABILITY 0x68 /* QPI Phys. Layer Capability */
#define QPI_PHY_CONTROL 0x6c /* QPI Phys. Layer Control */
#define QPI_PHY_INIT_STATUS 0x80 /* QPI Phys. Layer Initialization Status */
#define QPI_PHY_PRIM_TIMEOUT 0x94 /* QPI Phys. Layer Primary Timeout Value */
#define QPI_PHY_PWR_MGMT 0xd0 /* QPI Phys. Layer Power Management */
#define QPI_PHY_EP_SELECT 0xe0 /* QPI Phys. Layer Electrical Parameter Select */
#define QPI_PHY_EP_MCTR 0xf4 /* QPI Phys. Layer Electrical Parameter Misc. Control */
/* Device 0:2.0 PCI configuration space (Graphics Device) */