soc/amd/mendocino/chip: use common data fabric domain resource code

Use the new common AMD code that gets the usable non-fixed MMIO windows
from the data fabric MMIO decode registers and generate the PCI0 _CRS
ACPI code based on those regions. For a more detailed description see
the corresponding patch that changes the Picasso code to use this new
code. In contrast to the Picasso code, this change will drop the
unneeded _STA method inside the PCI0 scope which wasn't present in
Picasso's ACPI code before it got replaced by the SSDT that gets
generated by amd_pci_domain_fill_ssdt.

TEST=None

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Iad34d74d9f6cbed1d8a71a561a505f563e31db18
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75558
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Felix Held
2023-05-31 16:21:35 +02:00
parent 9adc33d0d0
commit a4f4b0a922
4 changed files with 4 additions and 64 deletions

View File

@ -373,8 +373,6 @@ static void root_complex_fill_ssdt(const struct device *device)
{
uint32_t tdp = 0;
acpi_fill_root_complex_tom(device);
if (get_amd_smu_reported_tdp(&tdp) != CB_SUCCESS) {
/* Unknown TDP, so return rather than setting invalid values. */
return;