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src/mainboard: Const'ify pci_devfn_t devices

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Change-Id: I5bb1a819475383719dbda32d9b5fea63da1e6713
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40611
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Elyes HAOUAS
2020-04-22 16:49:28 +02:00
committed by Angel Pons
parent cfdac82661
commit a4faec3b01
8 changed files with 18 additions and 20 deletions
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6
src/mainboard/google/jecht/chromeos.c
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@@ -30,20 +30,20 @@ void fill_lb_gpios(struct lb_gpios *gpios)
int get_write_protect_state(void)
{
pci_devfn_t dev = PCI_DEV(0, 0x1f, 2);
const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2);
return (pci_s_read_config32(dev, SATA_SP) >> FLAG_SPI_WP) & 1;
}
int get_recovery_mode_switch(void)
{
pci_devfn_t dev = PCI_DEV(0, 0x1f, 2);
const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2);
return (pci_s_read_config32(dev, SATA_SP) >> FLAG_REC_MODE) & 1;
}
void init_bootmode_straps(void)
{
u32 flags = 0;
pci_devfn_t dev = PCI_DEV(0, 0x1f, 2);
const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2);
/* Write Protect: GPIO58 = GPIO_SPI_WP, active high */
if (get_gpio(GPIO_SPI_WP))