security/intel/stm: Use correct SMBASE for SMM descriptor setup
Commit ea3376c (SMM module loader version 2) changedhow the SMBASE is calculated. This patch modifies setup_smm_descriptor to properly acquire the SMBASE. This patch has been tested on a Purism L1UM-1X8C and a Purism 15v4. Signed-off-by: Eugene Myers <cedarhouse@comcast.net> Change-Id: I1d62a36cdcbc20a19c42266164e612fb96f91953 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61688 Reviewed-by: Eugene Myers <cedarhouse1@comcast.net> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@@ -75,7 +75,7 @@ void notify_stm_resource_change(void *stm_resource);
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*/
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*/
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void *get_stm_resource(void);
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void *get_stm_resource(void);
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void setup_smm_descriptor(void *smbase, void *base_smbase, int32_t apic_id,
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void setup_smm_descriptor(void *smbase, int32_t apic_id,
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int32_t entry32_off);
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int32_t entry32_off);
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/*
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/*
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@@ -77,8 +77,7 @@ static void read_gdtr(struct descriptor *gdtr)
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__asm__ __volatile__("sgdt %0" : "=m"(*gdtr));
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__asm__ __volatile__("sgdt %0" : "=m"(*gdtr));
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}
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}
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void setup_smm_descriptor(void *smbase, void *base_smbase, int32_t apic_id,
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void setup_smm_descriptor(void *smbase, int32_t apic_id, int32_t entry32_off)
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int32_t entry32_off)
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{
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{
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struct descriptor gdtr;
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struct descriptor gdtr;
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void *smbase_processor;
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void *smbase_processor;
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@@ -103,7 +102,7 @@ void setup_smm_descriptor(void *smbase, void *base_smbase, int32_t apic_id,
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psd->smm_descriptor_ver_minor =
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psd->smm_descriptor_ver_minor =
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TXT_PROCESSOR_SMM_DESCRIPTOR_VERSION_MINOR;
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TXT_PROCESSOR_SMM_DESCRIPTOR_VERSION_MINOR;
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psd->smm_smi_handler_rip =
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psd->smm_smi_handler_rip =
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(uint64_t)((uintptr_t)base_smbase + SMM_ENTRY_OFFSET +
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(uint64_t)((uintptr_t)smbase + SMM_ENTRY_OFFSET +
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entry32_off);
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entry32_off);
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psd->local_apic_id = apic_id;
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psd->local_apic_id = apic_id;
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psd->size = sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR);
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psd->size = sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR);
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@@ -123,7 +122,7 @@ void setup_smm_descriptor(void *smbase, void *base_smbase, int32_t apic_id,
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read_gdtr(&gdtr);
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read_gdtr(&gdtr);
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gdtr.base -= (uintptr_t) smbase_processor;
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gdtr.base -= (uintptr_t) smbase_processor;
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gdtr.base += (uintptr_t) base_smbase;
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gdtr.base += (uintptr_t) smbase;
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psd->smm_gdt_ptr = gdtr.base;
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psd->smm_gdt_ptr = gdtr.base;
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psd->smm_gdt_size = gdtr.limit + 1; // the stm will subtract, so add
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psd->smm_gdt_size = gdtr.limit + 1; // the stm will subtract, so add
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@@ -183,8 +182,8 @@ void stm_setup(uintptr_t mseg, int cpu, uintptr_t smbase,
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cpu, MsegChk.hi, MsegChk.lo);
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cpu, MsegChk.hi, MsegChk.lo);
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// setup the descriptor for this cpu
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// setup the descriptor for this cpu
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setup_smm_descriptor((void *)smbase, (void *) base_smbase,
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setup_smm_descriptor((void *)smbase, cpu, offset32);
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cpu, offset32);
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} else {
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} else {
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printk(BIOS_DEBUG,
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printk(BIOS_DEBUG,
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"STM: Error in STM load, STM not enabled: %d\n",
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"STM: Error in STM load, STM not enabled: %d\n",
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