soc/apollolake: Add soc core init

Skip FSP initiated core/MP init as it is implemented and initiated
in coreboot.

Add soc core init to set up the following feature MSRs:
 1. C-states
 2. IO/Mwait redirection

BUG=chrome-os-partner:56922
BRANCH=None

TEST= Check C-state functioning using 'powertop'. Check 0xE2 and
      0xE4 MSR to verify IO/Mwait redirection.
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>

Change-Id: I97c3d82f654be30a0d2d88cb68c8212af3d6f767
Reviewed-on: https://review.coreboot.org/16587
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/soc/intel/apollolake/chip.c

@@ -461,6 +461,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
 		silconfig->EmmcRxCmdDataCntl2 = cfg->emmc_rx_cmd_data_cntl2;
 
 	silconfig->LPSS_S0ixEnable = cfg->lpss_s0ix_enable;
+	silconfig->SkipMpInit = 1;
 
 	/* Disable monitor mwait since it is broken due to a hardware bug without a fix */
 	silconfig->MonitorMwaitEnable = 0;