Following patch adds necessary hooks and as well the compile time checks for
ACPI suspend/resume. The memory cleared now is just the coreboot memory not the low memory. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@@ -37,6 +37,7 @@ it with the version available from LANL.
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#include <part/init_timer.h>
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#include <boot/elf.h>
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#include <romfs.h>
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#include <arch/acpi.h>
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/**
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* @brief Main function of the DRAM part of coreboot.
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@@ -47,9 +48,11 @@ it with the version available from LANL.
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* Device Enumeration:
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* In the dev_enumerate() phase,
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*/
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void hardwaremain(int boot_complete)
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{
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struct lb_memory *lb_mem;
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void *wake_vec;
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post_code(0x80);
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@@ -84,11 +87,27 @@ void hardwaremain(int boot_complete)
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dev_initialize();
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post_code(0x89);
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#if HAVE_ACPI_RESUME == 1
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#if MEM_TRAIN_SEQ != 0
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#error "So far it works on AMD and MEM_TRAIN_SEQ == 0"
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#endif
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#if _RAMBASE < 0x1F00000
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#error "For ACPI RESUME you need to have _RAMBASE at least 31MB"
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#error "Chipset support (S3_NVRAM_EARLY and ACPI_IS_WAKEUP_EARLY functions and memory ctrl)"
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#error "And coreboot memory reserved in mainboard.c"
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#endif
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/* if we happen to be resuming find wakeup vector and jump to OS */
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wake_vec = acpi_find_wakeup_vector();
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if (wake_vec)
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acpi_jump_to_wakeup(wake_vec);
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#endif
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/* Now that we have collected all of our information
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* write our configuration tables.
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*/
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lb_mem = write_tables();
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#if CONFIG_ROMFS == 1
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# if USE_FALLBACK_IMAGE == 1
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void (*pl)(void) = romfs_load_payload(lb_mem, "fallback/payload");
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