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coreboot tables: Add type-c port info to coreboot table

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This change adds type-c port information for USB Type-C ports to the
coreboot table.  This allows depthcharge to know the usb2 and usb3
port number assignments for each available port, as well as the SBU
and data line orientation for the board.

BUG=b:149830546
TEST='emerge-volteer coreboot chromeos-bootimage' and verify it builds
successfully.  Cherry-pick CL to enable this feature for volteer,
flash and boot volteer2 to kernel, log in and check cbmem for type-c
info exported to the payload:
  localhost ~ # cbmem -c | grep type-c
  added type-c port0 info to cbmem: usb2:9 usb3:1 sbu:0 data:0
  added type-c port1 info to cbmem: usb2:4 usb3:2 sbu:1 data:0

Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Change-Id: Ice732be2fa634dbf31ec620552b383c4a5b41451
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57069
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Nick Vaccaro
2021-10-01 13:12:59 -07:00
parent 56da0b79ad
commit a62b41819c
6 changed files with 54 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
payloads/libpayload/libc/coreboot.c
View File

@ -246,6 +246,11 @@ static void cb_parse_fmap_cache(void *ptr, struct sysinfo_t *info)
info->fmap_cache = get_cbmem_addr(ptr);
}
static void cb_parse_type_c_info(void *ptr, struct sysinfo_t *info)
{
info->type_c_info = get_cbmem_addr(ptr);
}
#if CONFIG(LP_TIMER_RDTSC)
static void cb_parse_tsc_info(void *ptr, struct sysinfo_t *info)
{
@ -420,6 +425,9 @@ int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
case CB_TAG_FMAP:
cb_parse_fmap_cache(ptr, info);
break;
case CB_TAG_TYPE_C_INFO:
cb_parse_type_c_info(ptr, info);
break;
default:
cb_parse_arch_specific(rec, info);
break;