Whitespace fixes.
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3638 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -110,7 +110,6 @@ void get_bus_conf(void)
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memset(m, 0, sizeof(struct mb_sysconf_t));
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sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
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for (i = 0; i < sysconf.hc_possible_num; i++) {
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sysconf.pci1234[i] = pci1234x[i];
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sysconf.hcdn[i] = hcdnx[i];
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@ -20,10 +20,10 @@
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*/
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/* This file was generated by getpir.c, do not modify!
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(but if you do, please run checkpir on it to verify)
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Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
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* (but if you do, please run checkpir on it to verify)
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* Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
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Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
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* Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
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*/
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#include <console/console.h>
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#include <device/pci.h>
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@ -49,17 +49,6 @@
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#include "arch/i386/lib/console.c"
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#if 0
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static void post_code(uint8_t value) {
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#if 1
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int i;
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for(i=0;i<0x80000;i++) {
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outb(value, 0x80);
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}
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#endif
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}
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#endif
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#include <cpu/amd/model_fxx_rev.h>
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#include "northbridge/amd/amdk8/raminit.h"
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#include "cpu/amd/model_fxx/apic_timer.c"
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@ -153,8 +153,6 @@ void get_bus_conf(void)
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printk_debug("i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa);
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}
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/*I/O APICs: APIC ID Version State Address*/
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#if CONFIG_LOGICAL_CPUS==1
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apicid_base = get_apicid_base(1);
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@ -20,10 +20,10 @@
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*/
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/* This file was generated by getpir.c, do not modify!
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(but if you do, please run checkpir on it to verify)
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Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
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* (but if you do, please run checkpir on it to verify)
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* Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
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Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
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* Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
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*/
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#include <console/console.h>
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#include <device/pci.h>
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@ -49,17 +49,6 @@
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#include "arch/i386/lib/console.c"
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#if 0
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static void post_code(uint8_t value) {
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#if 1
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int i;
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for(i=0;i<0x80000;i++) {
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outb(value, 0x80);
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}
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#endif
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}
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#endif
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#include <cpu/amd/model_fxx_rev.h>
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#include "northbridge/amd/amdk8/raminit.h"
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#include "cpu/amd/model_fxx/apic_timer.c"
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@ -286,7 +286,6 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
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printk_debug("bsp_apicid = %02x \n", bsp_apicid);
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printk_debug("cpu_init_detectedx = %08x \n", cpu_init_detectedx);
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/* Setup sysinfo defaults */
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set_sysinfo_in_ram(0);
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@ -308,9 +307,9 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
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/* wait for all the APs core0 started by finalize_node_setup. */
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/* FIXME: A bunch of cores are going to start output to serial at once.
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It would be nice to fixup prink spinlocks for ROM XIP mode.
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I think it could be done by putting the spinlock flag in the cache
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of the BSP located right after sysinfo.
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* It would be nice to fixup prink spinlocks for ROM XIP mode.
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* I think it could be done by putting the spinlock flag in the cache
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* of the BSP located right after sysinfo.
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*/
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wait_all_core0_started();
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@ -329,7 +328,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
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printk_debug("\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo);
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/* FIXME: The sb fid change may survive the warm reset and only
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need to be done once.*/
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* need to be done once.*/
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enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
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post_code(0x39);
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@ -127,7 +127,6 @@ void get_bus_conf(void)
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printk_debug("i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa);
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}
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/*I/O APICs: APIC ID Version State Address*/
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#if CONFIG_LOGICAL_CPUS==1
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apicid_base = get_apicid_base(1);
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@ -20,10 +20,10 @@
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*/
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/* This file was generated by getpir.c, do not modify!
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(but if you do, please run checkpir on it to verify)
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Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
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* (but if you do, please run checkpir on it to verify)
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* Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
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Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
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* Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
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*/
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#include <console/console.h>
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#include <device/pci.h>
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