Whitespace fixes.
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3638 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
		| @@ -110,7 +110,6 @@ void get_bus_conf(void) | ||||
| 	memset(m, 0, sizeof(struct mb_sysconf_t)); | ||||
|  | ||||
| 	sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); | ||||
|  | ||||
| 	for (i = 0; i < sysconf.hc_possible_num; i++) { | ||||
| 		sysconf.pci1234[i] = pci1234x[i]; | ||||
| 		sysconf.hcdn[i] = hcdnx[i]; | ||||
|   | ||||
| @@ -20,10 +20,10 @@ | ||||
|  */ | ||||
|  | ||||
| /* This file was generated by getpir.c, do not modify! | ||||
|    (but if you do, please run checkpir on it to verify) | ||||
|    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up | ||||
|  * (but if you do, please run checkpir on it to verify) | ||||
|  * Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up | ||||
|  | ||||
|    Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM | ||||
|  * Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM | ||||
| */ | ||||
| #include <console/console.h> | ||||
| #include <device/pci.h> | ||||
|   | ||||
| @@ -49,17 +49,6 @@ | ||||
|  | ||||
| #include "arch/i386/lib/console.c" | ||||
|  | ||||
| #if 0  | ||||
| static void post_code(uint8_t value) { | ||||
| #if 1 | ||||
|         int i; | ||||
|         for(i=0;i<0x80000;i++) { | ||||
|                 outb(value, 0x80); | ||||
|         } | ||||
| #endif | ||||
| } | ||||
| #endif | ||||
|  | ||||
| #include <cpu/amd/model_fxx_rev.h> | ||||
| #include "northbridge/amd/amdk8/raminit.h" | ||||
| #include "cpu/amd/model_fxx/apic_timer.c" | ||||
|   | ||||
| @@ -153,8 +153,6 @@ void get_bus_conf(void) | ||||
| 		printk_debug("i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa); | ||||
| 	} | ||||
|  | ||||
|  | ||||
|  | ||||
| /*I/O APICs:	APIC ID	Version	State		Address*/ | ||||
| #if CONFIG_LOGICAL_CPUS==1 | ||||
| 	apicid_base = get_apicid_base(1); | ||||
|   | ||||
| @@ -20,10 +20,10 @@ | ||||
|  */ | ||||
|  | ||||
| /* This file was generated by getpir.c, do not modify! | ||||
|    (but if you do, please run checkpir on it to verify) | ||||
|    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up | ||||
|  * (but if you do, please run checkpir on it to verify) | ||||
|  * Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up | ||||
|  | ||||
|    Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM | ||||
|  * Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM | ||||
| */ | ||||
| #include <console/console.h> | ||||
| #include <device/pci.h> | ||||
|   | ||||
| @@ -49,17 +49,6 @@ | ||||
|  | ||||
| #include "arch/i386/lib/console.c" | ||||
|  | ||||
| #if 0  | ||||
| static void post_code(uint8_t value) { | ||||
| #if 1 | ||||
|         int i; | ||||
|         for(i=0;i<0x80000;i++) { | ||||
|                 outb(value, 0x80); | ||||
|         } | ||||
| #endif | ||||
| } | ||||
| #endif | ||||
|  | ||||
| #include <cpu/amd/model_fxx_rev.h> | ||||
| #include "northbridge/amd/amdk8/raminit.h" | ||||
| #include "cpu/amd/model_fxx/apic_timer.c" | ||||
|   | ||||
| @@ -286,7 +286,6 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx) | ||||
| 	printk_debug("bsp_apicid = %02x \n", bsp_apicid); | ||||
| 	printk_debug("cpu_init_detectedx = %08x \n", cpu_init_detectedx); | ||||
|  | ||||
|  | ||||
| 	/* Setup sysinfo defaults */ | ||||
| 	set_sysinfo_in_ram(0); | ||||
|  | ||||
| @@ -308,9 +307,9 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx) | ||||
|  | ||||
| 	/* wait for all the APs core0 started by finalize_node_setup. */ | ||||
| 	/* FIXME: A bunch of cores are going to start output to serial at once. | ||||
| 	   It would be nice to fixup prink spinlocks for ROM XIP mode. | ||||
| 	   I think it could be done by putting the spinlock flag in the cache | ||||
| 	   of the BSP located right after sysinfo. | ||||
| 	 * It would be nice to fixup prink spinlocks for ROM XIP mode. | ||||
| 	 * I think it could be done by putting the spinlock flag in the cache | ||||
| 	 * of the BSP located right after sysinfo. | ||||
| 	 */ | ||||
| 	wait_all_core0_started(); | ||||
|  | ||||
| @@ -329,7 +328,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx) | ||||
| 	printk_debug("\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo); | ||||
|  | ||||
| 	/* FIXME: The sb fid change may survive the warm reset and only | ||||
| 	   need to be done once.*/ | ||||
| 	 * need to be done once.*/ | ||||
| 	enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn); | ||||
|  | ||||
| 	post_code(0x39); | ||||
|   | ||||
| @@ -127,7 +127,6 @@ void get_bus_conf(void) | ||||
| 		printk_debug("i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa); | ||||
| 	} | ||||
|  | ||||
|  | ||||
| /*I/O APICs:	APIC ID	Version	State		Address*/ | ||||
| #if CONFIG_LOGICAL_CPUS==1 | ||||
| 	apicid_base = get_apicid_base(1); | ||||
|   | ||||
| @@ -20,10 +20,10 @@ | ||||
|  */ | ||||
|  | ||||
| /* This file was generated by getpir.c, do not modify!  | ||||
|    (but if you do, please run checkpir on it to verify) | ||||
|    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up | ||||
|  * (but if you do, please run checkpir on it to verify) | ||||
|  * Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up | ||||
|  | ||||
|    Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM | ||||
|  * Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM | ||||
| */ | ||||
| #include <console/console.h> | ||||
| #include <device/pci.h> | ||||
|   | ||||
		Reference in New Issue
	
	Block a user