soc/qualcomm/ipq40xx: Initial commit for IPQ40xx SoC support
Copy 'ipq806x' files as a template BUG=chrome-os-partner:49249 TEST=None. Initial code not sure if it will even compile BRANCH=none Original-Commit-Id: dc6a5937953fe61cd4b5a99ca49f9371c4b712d4 Original-Change-Id: If171fcdd3b0561cb6b7dab5f8434de7ef711ea41 Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Original-Signed-off-by: Kan Yan <kyan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/333178 Original-Commit-Ready: David Hendricks <dhendrix@chromium.org> Original-Tested-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> squashed: soc/qualcomm/ipq40xx: Update ipq806x/storm references Since the files were taken from ipq806x/storm as template. Update those references to reflect ipq40xx/gale. BUG=chrome-os-partner:49249 TEST=None. Initial code not sure if it will even compile BRANCH=none Original-Commit-Id: c6c76d184cc92c09e6826fbdc7d7fac59b2cb69b Original-Change-Id: Ieae1bce25291243b4a6034d37a6949978f318997 Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Original-Reviewed-on: https://chromium-review.googlesource.com/333293 Original-Commit-Ready: David Hendricks <dhendrix@chromium.org> Original-Tested-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Change-Id: Ie5794c48131ae562861074b406106734541880d9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/14644 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
committed by
Patrick Georgi
parent
c84e2fe893
commit
a6935c2508
170
src/soc/qualcomm/ipq40xx/i2c.c
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170
src/soc/qualcomm/ipq40xx/i2c.c
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 - 2015 The Linux Foundation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of The Linux Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch/io.h>
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#include <assert.h>
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#include <console/console.h>
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#include <delay.h>
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#include <device/i2c.h>
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#include <stdlib.h>
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#include <string.h>
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#include <soc/gsbi.h>
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#include <soc/qup.h>
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static qup_config_t gsbi1_qup_config = {
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QUP_MINICORE_I2C_MASTER,
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100000,
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24000000,
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QUP_MODE_FIFO,
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0
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};
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static qup_config_t gsbi4_qup_config = {
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QUP_MINICORE_I2C_MASTER,
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100000,
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24000000,
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QUP_MODE_FIFO,
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0
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};
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static qup_config_t gsbi7_qup_config = {
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QUP_MINICORE_I2C_MASTER,
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100000,
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24000000,
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QUP_MODE_FIFO,
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0
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};
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static int i2c_read(uint32_t gsbi_id, uint8_t slave,
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uint8_t *data, int data_len)
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{
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qup_data_t obj;
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qup_return_t qup_ret = 0;
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memset(&obj, 0, sizeof(obj));
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obj.protocol = QUP_MINICORE_I2C_MASTER;
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obj.p.iic.addr = slave;
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obj.p.iic.data_len = data_len;
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obj.p.iic.data = data;
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qup_ret = qup_recv_data(gsbi_id, &obj);
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if (QUP_SUCCESS != qup_ret)
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return 1;
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else
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return 0;
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}
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static int i2c_write(uint32_t gsbi_id, uint8_t slave,
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uint8_t *data, int data_len, uint8_t stop_seq)
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{
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qup_data_t obj;
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qup_return_t qup_ret = 0;
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memset(&obj, 0, sizeof(obj));
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obj.protocol = QUP_MINICORE_I2C_MASTER;
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obj.p.iic.addr = slave;
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obj.p.iic.data_len = data_len;
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obj.p.iic.data = data;
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qup_ret = qup_send_data(gsbi_id, &obj, stop_seq);
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if (QUP_SUCCESS != qup_ret)
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return 1;
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else
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return 0;
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}
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static int i2c_init(unsigned bus)
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{
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unsigned gsbi_id = bus;
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qup_config_t *qup_config;
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switch (gsbi_id) {
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case GSBI_ID_1:
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qup_config = &gsbi1_qup_config;
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break;
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case GSBI_ID_4:
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qup_config = &gsbi4_qup_config;
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break;
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case GSBI_ID_7:
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qup_config = &gsbi7_qup_config;
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break;
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default:
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printk(BIOS_ERR, "QUP configuration not defind for GSBI%d.\n",
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gsbi_id);
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return 1;
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}
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if (qup_config->initialized)
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return 0;
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if (gsbi_init(gsbi_id, GSBI_PROTO_I2C_ONLY)) {
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printk(BIOS_ERR, "failed to initialize gsbi\n");
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return 1;
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}
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if (qup_init(gsbi_id, qup_config)) {
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printk(BIOS_ERR, "failed to initialize qup\n");
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return 1;
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}
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if (qup_reset_i2c_master_status(gsbi_id)) {
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printk(BIOS_ERR, "failed to reset i2c master status\n");
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return 1;
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}
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qup_config->initialized = 1;
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return 0;
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}
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int platform_i2c_transfer(unsigned bus, struct i2c_seg *segments, int seg_count)
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{
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struct i2c_seg *seg = segments;
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int ret = 0;
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if (i2c_init(bus))
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return 1;
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while (!ret && seg_count--) {
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if (seg->read)
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ret = i2c_read(bus, seg->chip, seg->buf, seg->len);
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else
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ret = i2c_write(bus, seg->chip, seg->buf, seg->len,
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(seg_count ? 0 : 1));
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seg++;
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}
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if (ret) {
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qup_set_state(bus, QUP_STATE_RESET);
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return 1;
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}
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return 0;
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}
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