soc/intel/alderlake: Enable eMMC based on dev enabled

1. Add eMMC device function in pci_devs.h.
2. Enable eMMC device and configuration based on dev enabled.
3. Add SOC acpi name for eMMC.

Change-Id: I44f17420f7a2a1ca0fbb6cfb1886b1617c5a5064
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61129
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Krishna Prasad Bhat
2022-01-16 23:16:24 +05:30
committed by Felix Held
parent d2ca5be61a
commit a6d642fa8d
4 changed files with 28 additions and 0 deletions

View File

@@ -419,6 +419,11 @@ struct soc_intel_alderlake_config {
* accordingly */
uint8_t HybridStorageMode;
#if CONFIG(SOC_INTEL_ALDERLAKE_PCH_N)
/* eMMC HS400 mode */
uint8_t emmc_enable_hs400_mode;
#endif
/*
* Override CPU flex ratio value:
* CPU ratio value controls the maximum processor non-turbo ratio.