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soc/intel/alderlake: Enable eMMC based on dev enabled

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1. Add eMMC device function in pci_devs.h.
2. Enable eMMC device and configuration based on dev enabled.
3. Add SOC acpi name for eMMC.

Change-Id: I44f17420f7a2a1ca0fbb6cfb1886b1617c5a5064
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61129
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Krishna Prasad Bhat
2022-01-16 23:16:24 +05:30
committed by Felix Held
parent d2ca5be61a
commit a6d642fa8d
4 changed files with 28 additions and 0 deletions
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14
src/soc/intel/alderlake/fsp_params.c
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@@ -183,6 +183,14 @@ static const struct slot_irq_constraints irq_constraints[] = {
DIRECT_IRQ(PCH_DEVFN_UART2),
},
},
#if CONFIG(SOC_INTEL_ALDERLAKE_PCH_N)
{
.slot = PCH_DEV_SLOT_EMMC,
.fns = {
ANY_PIRQ(PCH_DEVFN_EMMC),
},
},
#endif
{
.slot = PCH_DEV_SLOT_PCIE,
.fns = {
@@ -596,6 +604,12 @@ static void fill_fsps_pm_timer_params(FSP_S_CONFIG *s_cfg,
static void fill_fsps_storage_params(FSP_S_CONFIG *s_cfg,
const struct soc_intel_alderlake_config *config)
{
#if CONFIG(SOC_INTEL_ALDERLAKE_PCH_N)
/* eMMC Configuration */
s_cfg->ScsEmmcEnabled = is_devfn_enabled(PCH_DEVFN_EMMC);
if (s_cfg->ScsEmmcEnabled)
s_cfg->ScsEmmcHs400Enabled = config->emmc_enable_hs400_mode;
#endif
/* Enable Hybrid storage auto detection */
s_cfg->HybridStorageMode = config->HybridStorageMode;
}