bootblock updates:
- allow CPU to define bootblock code, too. - drop unneeded __PRE_RAM__ define - move CBFS specific code out of bootblock_common.h into cbfs.h Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Stefan Reinauer
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6aef5542f8
commit
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26
src/arch/x86/include/arch/cbfs.h
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26
src/arch/x86/include/arch/cbfs.h
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@ -0,0 +1,26 @@
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static void *walkcbfs(char *target)
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{
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void *entry;
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asm volatile (
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"mov $1f, %%esp\n\t"
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"jmp walkcbfs_asm\n\t"
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"1:\n\t" : "=a" (entry) : "S" (target) : "ebx", "ecx", "edi", "esp");
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return entry;
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}
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/* just enough to support findstage. copied because the original version doesn't easily pass through romcc */
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struct cbfs_stage_restricted {
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unsigned long compression;
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unsigned long entry; // this is really 64bit, but properly endianized
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};
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static inline unsigned long findstage(char* target)
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{
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return ((struct cbfs_stage_restricted *)walkcbfs(target))->entry;
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}
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static inline void call(unsigned long addr, unsigned long bist)
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{
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asm volatile ("jmp *%0\n\t" : : "r" (addr), "a" (bist));
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}
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@ -1,4 +1,3 @@
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#define __PRE_RAM__
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#if CONFIG_LOGICAL_CPUS && \
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#if CONFIG_LOGICAL_CPUS && \
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(defined(CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT) || defined(CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT))
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(defined(CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT) || defined(CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT))
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#include <cpu/x86/lapic/boot_cpu.c>
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#include <cpu/x86/lapic/boot_cpu.c>
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@ -6,6 +5,11 @@
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#define boot_cpu(x) 1
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#define boot_cpu(x) 1
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#endif
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#endif
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#ifdef CONFIG_BOOTBLOCK_CPU_INIT
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#include CONFIG_BOOTBLOCK_CPU_INIT
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#else
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static void bootblock_cpu_init(void) { }
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#endif
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#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
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#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
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#include CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
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#include CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
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#else
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#else
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@ -17,31 +21,7 @@ static void bootblock_northbridge_init(void) { }
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static void bootblock_southbridge_init(void) { }
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static void bootblock_southbridge_init(void) { }
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#endif
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#endif
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static void *walkcbfs(char *target)
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#include <arch/cbfs.h>
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{
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void *entry;
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asm volatile (
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"mov $1f, %%esp\n\t"
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"jmp walkcbfs_asm\n\t"
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"1:\n\t" : "=a" (entry) : "S" (target) : "ebx", "ecx", "edi", "esp");
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return entry;
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}
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/* just enough to support findstage. copied because the original version doesn't easily pass through romcc */
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struct cbfs_stage {
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unsigned long compression;
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unsigned long entry; // this is really 64bit, but properly endianized
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};
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static unsigned long findstage(char* target)
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{
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return ((struct cbfs_stage*)walkcbfs(target))->entry;
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}
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static void call(unsigned long addr, unsigned long bist)
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{
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asm volatile ("jmp *%0\n\t" : : "r" (addr), "a" (bist));
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}
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#if CONFIG_USE_OPTION_TABLE
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#if CONFIG_USE_OPTION_TABLE
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#include <pc80/mc146818rtc.h>
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#include <pc80/mc146818rtc.h>
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@ -6,6 +6,7 @@ static void main(unsigned long bist)
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if (boot_cpu()) {
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if (boot_cpu()) {
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bootblock_northbridge_init();
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bootblock_northbridge_init();
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bootblock_southbridge_init();
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bootblock_southbridge_init();
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bootblock_cpu_init();
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}
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}
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#if CONFIG_USE_OPTION_TABLE
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#if CONFIG_USE_OPTION_TABLE
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@ -5,6 +5,7 @@ static void main(unsigned long bist)
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if (boot_cpu()) {
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if (boot_cpu()) {
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bootblock_northbridge_init();
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bootblock_northbridge_init();
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bootblock_southbridge_init();
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bootblock_southbridge_init();
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bootblock_cpu_init();
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}
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}
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#if CONFIG_USE_OPTION_TABLE
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#if CONFIG_USE_OPTION_TABLE
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