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HAVE_MOVNTI really means SSE2. Also add sfence in the MOVNTI case.

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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5159 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2010-02-25 13:40:49 +00:00
committed by Stefan Reinauer
parent 3a54ac9c36
commit a7acc515bd
15 changed files with 38 additions and 19 deletions
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18
src/cpu/Kconfig
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@@ -32,14 +32,26 @@ config SMP
This option is used to enable certain functions to make coreboot
work correctly on symmetric multi processor (SMP) systems.
# Set MMX and SSE in socket or model if the CPU has them.
# If all CPUs for the socket have MMX or SSE, set them there.
# These options are only needed for boards compiled with romcc.
config MMX
bool
help
Select MMX in your socket or model Kconfig if your CPU has MMX
streaming SIMD instructions. ROMCC can build more efficient
code if it can spill to MMX registers.
config SSE
bool
help
Select SSE in your socket or model Kconfig if your CPU has SSE
streaming SIMD instructions. ROMCC can build more efficient
code if it can spill to SSE (aka XMM) registers.
config SSE2
bool
help
Select SSE2 in your socket or model Kconfig if your CPU has SSE2
streaming SIMD instructions. Some parts of coreboot can be built
with more efficient code if SSE2 instructions are available.
config VAR_MTRR_HOLE
bool