sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

haswell/broadwell: Replace remaining MCHBAR accessors

Browse Source 
Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 and Purism Librem 13 v1
remain identical.

Change-Id: I74b633fb0b012304b5b4bd943272ed82dcb6f7d5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52468
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons
2021-04-17 14:34:37 +02:00
parent cf730ce481
commit a8753e9cbb
7 changed files with 34 additions and 41 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
src/soc/intel/broadwell/northbridge.c
View File

@@ -93,7 +93,7 @@ static int get_bar_in_mchbar(struct device *dev, unsigned int index, u32 *base,
{
u32 bar;
bar = MCHBAR32(index);
bar = mchbar_read32(index);
/* If not enabled don't report it. */
if (!(bar & 0x1))
@@ -400,21 +400,14 @@ static void systemagent_read_resources(struct device *dev)
static void systemagent_init(struct device *dev)
{
u8 bios_reset_cpl, pair;
/* Enable Power Aware Interrupt Routing */
pair = MCHBAR8(MCH_PAIR);
pair &= ~0x7; /* Clear 2:0 */
pair |= 0x4; /* Fixed Priority */
MCHBAR8(MCH_PAIR) = pair;
/* Enable Power Aware Interrupt Routing. */
mchbar_clrsetbits8(MCH_PAIR, 0x7, 0x4); /* Clear 2:0, set Fixed Priority */
/*
* Set bits 0+1 of BIOS_RESET_CPL to indicate to the CPU
* that BIOS has initialized memory and power management
*/
bios_reset_cpl = MCHBAR8(BIOS_RESET_CPL);
bios_reset_cpl |= 3;
MCHBAR8(BIOS_RESET_CPL) = bios_reset_cpl;
mchbar_setbits8(BIOS_RESET_CPL, 3);
printk(BIOS_DEBUG, "Set BIOS_RESET_CPL\n");
/* Configure turbo power limits 1ms after reset complete bit */