sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tables
Both southbridges need to be done at once since this southbridge code is used for different northbridges, which fails to compile when done separately. This needs an acpi_name functions in the northbridge code to be defined. TESTED on Intel DG43GT: show correct PIRQ ACPI entries in /sys/firmware/acpi/tables/SSDT. Change-Id: I286d251ddf8fcae27dd07011a1cd62d8f4847683 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/22981 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Patrick Georgi
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commit
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@@ -32,6 +32,7 @@
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#include <cbmem.h>
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#include <string.h>
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#include <drivers/intel/gma/i915.h>
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#include <southbridge/intel/common/acpi_pirq_gen.h>
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#include "nvs.h"
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#define NMI_OFF 0
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@@ -718,6 +719,16 @@ static void southbridge_inject_dsdt(struct device *dev)
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}
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}
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static const char *lpc_acpi_name(const struct device *dev)
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{
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return "LPCB";
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}
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static void southbridge_fill_ssdt(device_t device)
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{
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intel_acpi_gen_def_acpi_pirq(device);
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}
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static struct pci_operations pci_ops = {
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.set_subsystem = set_subsystem,
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};
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@@ -728,6 +739,8 @@ static struct device_operations device_ops = {
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.enable_resources = pci_dev_enable_resources,
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.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
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.write_acpi_tables = acpi_write_hpet,
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.acpi_fill_ssdt_generator = southbridge_fill_ssdt,
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.acpi_name = lpc_acpi_name,
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.init = lpc_init,
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.scan_bus = scan_lpc_bus,
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.enable = i82801gx_enable,
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