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soc/intel/tigerlake: Add GPIO helper function

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This patch adds ASL methods like GRXS, GTXS, STXS and CTXS
which are used to get, set and clear gpio values. We use
ASL 2.0 syntax here for gpio.asl.

BUG=b:144680462
BRANCH=none
TEST=Build and boot tigerlake rvp board

Change-Id: I17e75ff2a7cb67e94669059a1ed9d73a720ebcb1
Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38442
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Shaunak Saha 2020-01-15 15:35:41 -08:00 committed by Patrick Georgi
parent e8338da597
commit a8cb7ed784
1 changed files with 45 additions and 1 deletions
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46
src/soc/intel/tigerlake/acpi/gpio.asl
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@ -163,7 +163,51 @@ Method (GRXS, 1, Serialized)
{
VAL0, 32
}
And (GPIORXSTATE_MASK, ShiftRight (VAL0, GPIORXSTATE_SHIFT), Local0)
Local0 = GPIORXSTATE_MASK & (VAL0 >> GPIORXSTATE_SHIFT)
Return (Local0)
}
/*
* Get GPIO Tx Value
* Arg0 - GPIO Number
*/
Method (GTXS, 1, Serialized)
{
OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
Field (PREG, AnyAcc, NoLock, Preserve)
{
VAL0, 32
}
Local0 = GPIOTXSTATE_MASK & VAL0
Return (Local0)
}
/*
* Set GPIO Tx Value
* Arg0 - GPIO Number
*/
Method (STXS, 1, Serialized)
{
OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
Field (PREG, AnyAcc, NoLock, Preserve)
{
VAL0, 32
}
VAL0 |= GPIOTXSTATE_MASK
}
/*
* Clear GPIO Tx Value
* Arg0 - GPIO Number
*/
Method (CTXS, 1, Serialized)
{
OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
Field (PREG, AnyAcc, NoLock, Preserve)
{
VAL0, 32
}
VAL0 &= ~GPIOTXSTATE_MASK
}