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* add a generic preop-opcode-pair table.

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* rename ich_check_opcodes to ich_init_opcodes.

* let ich_init_opcodes do not need to access flashchip structure:
  . move the definition of struct preop_opcode_pair to a better place
  . remove preop_opcode_pairs from 'struct flashchip'
  . modify ich_init_opcodes and generate_opcodes so that they do not access the flashchip structure

* call ich_init_opcodes during chipset enable. Now OPCODES generation mechanism works.

* fix a coding style mistake.

Signed-off-by: FENG yu ning <fengyuning1984@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3814 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
FENG yu ning
2008-12-15 02:32:11 +00:00
committed by Peter Stuge
parent e65dcfa07a
commit a8faa2a479
3 changed files with 32 additions and 35 deletions
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9
util/flashrom/flash.h
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@ -51,12 +51,6 @@
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
/* for pairing opcodes with their required preop */
struct preop_opcode_pair {
uint8_t preop;
uint8_t opcode;
};
struct flashchip {
const char *vendor;
const char *name;
@ -82,8 +76,6 @@ struct flashchip {
int (*write) (struct flashchip *flash, uint8_t *buf);
int (*read) (struct flashchip *flash, uint8_t *buf);
struct preop_opcode_pair *preop_opcode_pairs;
/* Some flash devices have an additional register space. */
volatile uint8_t *virtual_memory;
volatile uint8_t *virtual_registers;
@ -537,6 +529,7 @@ int erase_en29f002a(struct flashchip *flash);
int write_en29f002a(struct flashchip *flash, uint8_t *buf);
/* ichspi.c */
int ich_init_opcodes();
int ich_spi_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr);
int ich_spi_read(struct flashchip *flash, uint8_t * buf);