arch/x86: Add <arch/romstage.h>

Start with moving all postcar_frame related function
declarations here from <arch/cpu.h>.

Change-Id: I9aeef07f9009e44cc08927c85fe1862edf5c70dc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34911
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/amd/picasso/romstage.c

@@ -16,6 +16,7 @@
 
 #include <device/pci_ops.h>
 #include <arch/cpu.h>
+#include <arch/romstage.h>
 #include <arch/acpi.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>

src/soc/amd/stoneyridge/romstage.c

@@ -16,6 +16,7 @@
 
 #include <device/pci_ops.h>
 #include <arch/cpu.h>
+#include <arch/romstage.h>
 #include <arch/acpi.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>

src/soc/intel/apollolake/romstage.c

@@ -17,6 +17,7 @@
  */
 
 #include <arch/cpu.h>
+#include <arch/romstage.h>
 #include <device/pci_ops.h>
 #include <arch/symbols.h>
 #include <assert.h>

src/soc/intel/baytrail/romstage/romstage.c

@@ -16,6 +16,7 @@
 #include <stddef.h>
 #include <arch/cpu.h>
 #include <arch/io.h>
+#include <arch/romstage.h>
 #include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <bootblock_common.h>

src/soc/intel/broadwell/romstage/romstage.c

@@ -16,7 +16,7 @@
 #include <stddef.h>
 #include <stdint.h>
 #include <arch/cbfs.h>
-#include <arch/cpu.h>
+#include <arch/romstage.h>
 #include <bootblock_common.h>
 #include <bootmode.h>
 #include <cbmem.h>

src/soc/intel/cannonlake/romstage/romstage.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/cpu.h>
+#include <arch/romstage.h>
 #include <cpu/x86/mtrr.h>
 #include <cbmem.h>
 #include <console/console.h>

src/soc/intel/denverton_ns/romstage.c

@@ -15,6 +15,7 @@
  */
 
 #include <arch/cpu.h>
+#include <arch/romstage.h>
 #include <arch/io.h>
 #include <cbmem.h>
 #include <cf9_reset.h>

src/soc/intel/icelake/romstage/romstage.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/cpu.h>
+#include <arch/romstage.h>
 #include <cpu/x86/mtrr.h>
 #include <cbmem.h>
 #include <console/console.h>

src/soc/intel/quark/romstage/fsp2_0.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/cpu.h>
+#include <arch/romstage.h>
 #include <arch/symbols.h>
 #include <console/console.h>
 #include <cbmem.h>

src/soc/intel/skylake/romstage/romstage_fsp20.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/cpu.h>
+#include <arch/romstage.h>
 #include <arch/symbols.h>
 #include <assert.h>
 #include <cpu/x86/mtrr.h>