- First stab at getting the ppc ports building and working.
- The sandpointx3+altimus has been consolidated into one directory for now. - Added support for having different versions of the pci access functions on a per bus basis if needed. Hopefully I have not broken something inadvertently. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -19,3 +19,5 @@ initinclude "FAMILY_INIT" cpu/ppc/mpc74xx/mpc74xx.inc
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object cache.S
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initobject cache.S
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dir /cpu/simple_init
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@ -24,3 +24,4 @@ object mem.o
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object clock.o
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object cache.S
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dir /cpu/simple_init
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@ -21,3 +21,5 @@ object clock.o
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object cache.S
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initobject clock.o
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initobject cache.S
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dir /cpu/simple_init
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@ -1,7 +1,7 @@
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#include <linux/console.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/path.h>
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#include <device/cpu.h>
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#include <cpu/cpu.h>
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#if CONFIG_SMP
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#error "This Configuration does not support SMP"
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@ -16,10 +16,11 @@ void initialize_cpus(struct bus *cpu_bus)
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info = cpu_info();
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/* Get the device path of the boot cpu */
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cpu_path.type = DEVICE_PATH_BOOT_CPU;
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cpu_path.type = DEVICE_PATH_CPU;
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cpu_path.u.cpu.id = 0;
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/* Find the device struct for the boot cpu */
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info->cpu = alloc_find_dev(bus, &cpu_path);
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info->cpu = alloc_find_dev(cpu_bus, &cpu_path);
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/* Initialize the bootstrap processor */
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cpu_initialize();
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@ -301,7 +301,8 @@ void initialize_cpus(struct bus *cpu_bus)
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cpu_path.u.apic.apic_id = lapicid();
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#else
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/* Get the device path of the boot cpu */
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cpu_path.type = DEVICE_PATH_DEFAULT_CPU;
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cpu_path.type = DEVICE_PATH_CPU;
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cpu_path.u.cpu.id = 0;
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#endif
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/* Find the device structure for the boot cpu */
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