- First stab at getting the ppc ports building and working.
- The sandpointx3+altimus has been consolidated into one directory for now. - Added support for having different versions of the pci access functions on a per bus basis if needed. Hopefully I have not broken something inadvertently. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@@ -33,7 +33,7 @@ extern uint32_t __div64_32(uint64_t *dividend, uint32_t divisor);
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uint32_t __base = (base); \
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uint32_t __rem; \
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(void)(((typeof((n)) *)0) == ((uint64_t *)0)); \
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if (likely(((n) >> 32) == 0)) { \
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if (((n) >> 32) == 0) { \
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__rem = (uint32_t)(n) % __base; \
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(n) = (uint32_t)(n) / __base; \
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} else \
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@@ -2,6 +2,7 @@
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#define CPU_CPU_H
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struct device;
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struct bus;
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#include <arch/cpu.h>
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void cpu_initialize(void);
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@@ -1,6 +1,6 @@
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#ifndef CPU_PPC_CPUID_H
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#define CPU_PPC_CPUID_H
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void display_cpuid(void);
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void display_cpuid(device_t dev);
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#endif /* CPU_PPC_CPUID_H */
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@@ -9,6 +9,7 @@
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struct device;
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typedef struct device * device_t;
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struct pci_operations;
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struct pci_bus_operations;
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struct smbus_bus_operations;
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/* Chip operations */
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@@ -30,10 +31,11 @@ struct device_operations {
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void (*set_resources)(device_t dev);
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void (*enable_resources)(device_t dev);
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void (*init)(device_t dev);
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unsigned int (*scan_bus)(device_t bus, unsigned int max);
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unsigned int (*scan_bus)(device_t bus, unsigned int max);
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void (*enable)(device_t dev);
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struct pci_operations *ops_pci;
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struct smbus_bus_operations *ops_smbus_bus;
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const struct pci_operations *ops_pci;
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const struct smbus_bus_operations *ops_smbus_bus;
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const struct pci_bus_operations *ops_pci_bus;
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};
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@@ -4,13 +4,14 @@
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enum device_path_type {
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DEVICE_PATH_NONE = 0,
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DEVICE_PATH_ROOT,
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DEVICE_PATH_DEFAULT_CPU,
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DEVICE_PATH_PCI,
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DEVICE_PATH_PNP,
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DEVICE_PATH_I2C,
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DEVICE_PATH_APIC,
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DEVICE_PATH_PCI_DOMAIN,
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DEVICE_PATH_APIC_CLUSTER,
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DEVICE_PATH_CPU,
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DEVICE_PATH_CPU_BUS,
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};
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struct pci_domain_path
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@@ -44,16 +45,28 @@ struct apic_cluster_path
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unsigned cluster;
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};
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struct cpu_path
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{
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unsigned id;
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};
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struct cpu_bus_path
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{
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unsigned id;
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};
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struct device_path {
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enum device_path_type type;
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union {
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struct pci_path pci;
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struct pnp_path pnp;
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struct i2c_path i2c;
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struct apic_path apic;
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struct pci_domain_path pci_domain;
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struct pci_path pci;
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struct pnp_path pnp;
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struct i2c_path i2c;
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struct apic_path apic;
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struct pci_domain_path pci_domain;
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struct apic_cluster_path apic_cluster;
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struct cpu_path cpu;
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struct cpu_bus_path cpu_bus;
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} u;
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};
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@@ -26,6 +26,16 @@ struct pci_operations {
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void (*set_subsystem)(device_t dev, unsigned vendor, unsigned device);
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};
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/* Common pci bus operations */
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struct pci_bus_operations {
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uint8_t (*read8) (struct bus *pbus, unsigned char bus, int devfn, int where);
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uint16_t (*read16) (struct bus *pbus, unsigned char bus, int devfn, int where);
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uint32_t (*read32) (struct bus *pbus, unsigned char bus, int devfn, int where);
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void (*write8) (struct bus *pbus, unsigned char bus, int devfn, int where, uint8_t val);
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void (*write16) (struct bus *pbus, unsigned char bus, int devfn, int where, uint16_t val);
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void (*write32) (struct bus *pbus, unsigned char bus, int devfn, int where, uint32_t val);
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};
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struct pci_driver {
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struct device_operations *ops;
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unsigned short vendor;
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@@ -55,9 +65,9 @@ void pci_dev_set_subsystem(device_t dev, unsigned vendor, unsigned device);
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#define PCI_IO_BRIDGE_ALIGN 4096
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#define PCI_MEM_BRIDGE_ALIGN (1024*1024)
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static inline struct pci_operations *ops_pci(device_t dev)
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static inline const struct pci_operations *ops_pci(device_t dev)
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{
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struct pci_operations *pops;
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const struct pci_operations *pops;
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pops = 0;
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if (dev && dev->ops) {
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pops = dev->ops->ops_pci;
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@@ -65,4 +75,14 @@ static inline struct pci_operations *ops_pci(device_t dev)
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return pops;
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}
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static inline const struct pci_bus_operations *ops_pci_bus(struct bus *bus)
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{
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const struct pci_bus_operations *bops;
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bops = 0;
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if (bus && bus->dev && bus->dev->ops) {
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bops = bus->dev->ops->ops_pci_bus;
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}
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return bops;
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}
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#endif /* PCI_H */
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