sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

x86 SMM: Relocator is intel-only

Browse Source 
Change-Id: I78519b8f060b1ba81e8b9c7c345820180a14f2fe
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/10441
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki
2015-06-06 08:49:50 +03:00
parent 6404dffe0c
commit aa04e18409
6 changed files with 5 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/cpu/x86/smm/Makefile.inc
View File

@@ -88,7 +88,6 @@ $(obj)/cpu/x86/smm/smm: $(obj)/cpu/x86/smm/smm.o $(src)/cpu/x86/smm/smm.ld
$(NM_smm) -n $(obj)/cpu/x86/smm/smm.elf | sort > $(obj)/cpu/x86/smm/smm.map $(NM_smm) -n $(obj)/cpu/x86/smm/smm.elf | sort > $(obj)/cpu/x86/smm/smm.map
$(OBJCOPY_smm) -O binary $(obj)/cpu/x86/smm/smm.elf $@ $(OBJCOPY_smm) -O binary $(obj)/cpu/x86/smm/smm.elf $@
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.S
ifeq ($(CONFIG_HAVE_SMI_HANDLER),y) ifeq ($(CONFIG_HAVE_SMI_HANDLER),y)
ramstage-srcs += $(obj)/cpu/x86/smm/smm.manual ramstage-srcs += $(obj)/cpu/x86/smm/smm.manual
endif endif

6
src/cpu/x86/smm/smmrelocate.S
View File

@@ -21,11 +21,6 @@
// Make sure no stage 2 code is included: // Make sure no stage 2 code is included:
#define __PRE_RAM__ #define __PRE_RAM__
/* On AMD's platforms we can set SMBASE by writing an MSR */
#if !CONFIG_NORTHBRIDGE_AMD_AMDK8 && !CONFIG_NORTHBRIDGE_AMD_AMDFAM10 \
&& !CONFIG_CPU_AMD_AGESA_FAMILY15_TN \
&& !CONFIG_CPU_AMD_AGESA_FAMILY15_RL
// FIXME: Is this piece of code southbridge specific, or // FIXME: Is this piece of code southbridge specific, or
// can it be cleaned up so this include is not required? // can it be cleaned up so this include is not required?
// It's needed right now because we get our DEFAULT_PMBASE from // It's needed right now because we get our DEFAULT_PMBASE from
@@ -191,4 +186,3 @@ smm_relocate:
/* That's it. return */ /* That's it. return */
rsm rsm
smm_relocation_end: smm_relocation_end:
#endif

3
src/southbridge/intel/i82801dx/Makefile.inc
View File

@@ -29,8 +29,9 @@ ramstage-y += usb.c
ramstage-y += usb2.c ramstage-y += usb2.c
ramstage-y += reset.c ramstage-y += reset.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm/smmrelocate.S
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
romstage-y += early_smbus.c romstage-y += early_smbus.c

1
src/southbridge/intel/i82801gx/Makefile.inc
View File

@@ -38,6 +38,7 @@ ramstage-y += reset.c
ramstage-y += watchdog.c ramstage-y += watchdog.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm/smmrelocate.S
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
romstage-y += early_smbus.c early_lpc.c romstage-y += early_smbus.c early_lpc.c

1
src/southbridge/intel/i82801ix/Makefile.inc
View File

@@ -37,6 +37,7 @@ ramstage-y += ../i82801gx/reset.c
ramstage-y += ../i82801gx/watchdog.c ramstage-y += ../i82801gx/watchdog.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm/smmrelocate.S
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
romstage-y += early_init.c romstage-y += early_init.c

1
src/southbridge/intel/sch/Makefile.inc
View File

@@ -33,6 +33,7 @@ ramstage-y += smbus.c
ramstage-y += reset.c ramstage-y += reset.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm/smmrelocate.S
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c