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libpayload: usb: dwc2: support interrupt transfer

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dwc2 host core do not have a periodic schedule list, so try to send
an interrupt packet in poll_intr_queue() function and use frame
number read from usb core register to calculate time and schedule
transfers.

BUG=None
TEST=Tested on RK3288 with two USB keyboards(connect to SoC without
USB hub), both work correctly.
BRANCH=None

Change-Id: I16f7977c45a84b37c32b7c495ca78ad76be9f0ce
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3d0206b86634bcfdbe03da3e2c8adf186470e157
Original-Change-Id: Ie54699162ef799f4d3d2a0abf850dbeb62417777
Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/280750
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Lin Huang <hl@rock-chips.com>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: http://review.coreboot.org/10774
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Yunzhi Li
2015-06-19 17:09:04 +08:00
committed by Patrick Georgi
parent 394933640b
commit aa33609d28
3 changed files with 139 additions and 12 deletions
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11
payloads/libpayload/drivers/usb/dwc2_private.h
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@ -24,9 +24,18 @@
typedef struct dwc_ctrl {
#define DMA_SIZE (64 * 1024)
void *dma_buffer;
uint32_t *hprt0;
u32 *hprt0;
u32 frame;
} dwc_ctrl_t;
typedef struct {
u8 *data;
endpoint_t *endp;
int reqsize;
u32 reqtiming;
u32 timestamp;
} intr_queue_t;
#define DWC2_INST(controller) ((dwc_ctrl_t *)((controller)->instance))
#define DWC2_REG(controller) ((dwc2_reg_t *)((controller)->reg_base))