libpayload: usb: dwc2: support interrupt transfer
dwc2 host core do not have a periodic schedule list, so try to send an interrupt packet in poll_intr_queue() function and use frame number read from usb core register to calculate time and schedule transfers. BUG=None TEST=Tested on RK3288 with two USB keyboards(connect to SoC without USB hub), both work correctly. BRANCH=None Change-Id: I16f7977c45a84b37c32b7c495ca78ad76be9f0ce Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 3d0206b86634bcfdbe03da3e2c8adf186470e157 Original-Change-Id: Ie54699162ef799f4d3d2a0abf850dbeb62417777 Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/280750 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Lin Huang <hl@rock-chips.com> Original-Tested-by: Lin Huang <hl@rock-chips.com> Reviewed-on: http://review.coreboot.org/10774 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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			@@ -364,10 +364,10 @@ typedef union {
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	uint32_t d32;
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	/* register bits */
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	struct {
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		unsigned nptxfstaddr:16;
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		unsigned nptxfdep:16;
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		unsigned txfstaddr:16;
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		unsigned txfdep:16;
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	};
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} gnptxfsiz_t;
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} gtxfsiz_t;
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/**
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 * This union represents the bit fields of the Core Receive FIFO Size
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@@ -511,6 +511,23 @@ typedef union {
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	};
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} hcfg_t;
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/**
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 * This union represents the bit fields in the Host Frame Number/Frame Time
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 * Remaining Register
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 */
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typedef union {
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	/* raw register data */
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	uint32_t d32;
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	/* register bits */
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	struct {
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		/** Frame Number */
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		unsigned frnum:16;
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		/** Frame Time Remaining */
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		unsigned frrem:16;
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	};
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} hfnum_t;
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/**
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 * This union represents the bit fields in the Host Port Control and status
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 * Register.
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