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libpayload: usb: dwc2: support interrupt transfer

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dwc2 host core do not have a periodic schedule list, so try to send
an interrupt packet in poll_intr_queue() function and use frame
number read from usb core register to calculate time and schedule
transfers.

BUG=None
TEST=Tested on RK3288 with two USB keyboards(connect to SoC without
USB hub), both work correctly.
BRANCH=None

Change-Id: I16f7977c45a84b37c32b7c495ca78ad76be9f0ce
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3d0206b86634bcfdbe03da3e2c8adf186470e157
Original-Change-Id: Ie54699162ef799f4d3d2a0abf850dbeb62417777
Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/280750
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Lin Huang <hl@rock-chips.com>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: http://review.coreboot.org/10774
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Yunzhi Li
2015-06-19 17:09:04 +08:00
committed by Patrick Georgi
parent 394933640b
commit aa33609d28
3 changed files with 139 additions and 12 deletions
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23
payloads/libpayload/include/usb/dwc2_registers.h
View File

@ -364,10 +364,10 @@ typedef union {
uint32_t d32;
/* register bits */
struct {
unsigned nptxfstaddr:16;
unsigned nptxfdep:16;
unsigned txfstaddr:16;
unsigned txfdep:16;
};
} gnptxfsiz_t;
} gtxfsiz_t;
/**
* This union represents the bit fields of the Core Receive FIFO Size
@ -511,6 +511,23 @@ typedef union {
};
} hcfg_t;
/**
* This union represents the bit fields in the Host Frame Number/Frame Time
* Remaining Register
*/
typedef union {
/* raw register data */
uint32_t d32;
/* register bits */
struct {
/** Frame Number */
unsigned frnum:16;
/** Frame Time Remaining */
unsigned frrem:16;
};
} hfnum_t;
/**
* This union represents the bit fields in the Host Port Control and status
* Register.