mb/google/zork: enable UART0 in devicetree

This a mainly a preparation for adding the MMIO UART devices to the
chipset devicetree.

TEST=none

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I533e4a909fdeb1614dbc5df015440b9df5d83233
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55544
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>

src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb

@@ -395,6 +395,7 @@ chip soc/amd/picasso
 		end
 	end
 
+	device mmio 0xfedc9000 on end # console on UART0
 	device mmio 0xfedca000 off end # UART1
 	device mmio 0xfedce000 off end # UART2
 	device mmio 0xfedcf000 off end # UART3

src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb

@@ -437,6 +437,7 @@ chip soc/amd/picasso
 		end
 	end
 
+	device mmio 0xfedc9000 on end # console on UART0
 	device mmio 0xfedca000 off end # UART1
 	device mmio 0xfedce000 off end # UART2
 	device mmio 0xfedcf000 off end # UART3