cpu/intel/common: Use a common acpi/cpu.asl file

Change-Id: Ifa5a3a22771ff2e0efa14fb765603fd5e0440d59
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/29894
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: David Guckian
This commit is contained in:
Arthur Heymans
2018-11-28 13:53:15 +01:00
committed by Duncan Laurie
parent cf9fc1ddfe
commit aaced4a932
93 changed files with 81 additions and 473 deletions

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@ -1,36 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/* These come from the dynamically created CPU SSDT */
External (\_PR.CNOT, MethodObj)
/* Notify OS to re-read CPU tables */
Method (PNOT)
{
\_PR.CNOT (0x81)
}
/* Notify OS to re-read CPU _PPC limit */
Method (PPCN)
{
\_PR.CNOT (0x80)
}
/* Notify OS to re-read Throttle Limit tables */
Method (TNOT)
{
\_PR.CNOT (0x82)
}

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@ -1,36 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/* These come from the dynamically created CPU SSDT */
External (\_PR.CNOT, MethodObj)
/* Notify OS to re-read CPU tables */
Method (PNOT)
{
\_PR.CNOT (0x81)
}
/* Notify OS to re-read CPU _PPC limit */
Method (PPCN)
{
\_PR.CNOT (0x80)
}
/* Notify OS to re-read Throttle Limit tables */
Method (TNOT)
{
\_PR.CNOT (0x82)
}