Convert all Intel i810 boards to CAR.

- Drop "select ROMCC" from the boards, as well as early_mtrr stuff.

 - Add "select CACHE_AS_RAM" to socket_PGA370/Kconfig, as well as the
   usual DCACHE_RAM_BASE and DCACHE_RAM_SIZE variables.

 - In socket_PGA370/Makefile.inc add:
   cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc

 - Other smaller related fixes.

Abuild-tested and boot-tested on MSI MS-6178.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5949 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/cpu/intel/socket_PGA370/Kconfig

@@ -21,10 +21,22 @@ config CPU_INTEL_SOCKET_PGA370
 	bool
 	select MMX
 	select UDELAY_TSC
+	select CACHE_AS_RAM
+
+if CPU_INTEL_SOCKET_PGA370
 
 # Not all CPUs for Socket 370 can do SSE2
 config SSE2
 	bool
 	default n
-	depends on CPU_INTEL_SOCKET_PGA370
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xc0000
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x01000
+
+endif
 

src/cpu/intel/socket_PGA370/Makefile.inc

@@ -27,3 +27,5 @@ subdirs-y += ../../x86/cache
 subdirs-y += ../../x86/smm
 subdirs-y += ../microcode
 
+cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc
+

src/cpu/intel/socket_PGA370/socket_PGA370.c

@@ -1,7 +1,6 @@
 #include <device/device.h>
 #include "chip.h"
 
-
 struct chip_operations cpu_intel_socket_PGA370_ops = {
 	CHIP_NAME("Socket PGA370 CPU")
 };