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mb/google/brya/var/xol: Configure Acoustic noise mitigation

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Enable Acoustic noise mitigation for xol. The setting values are from
internal power team.

- Enable Acoustic noise mitigation
- Set slow slew rate VCCIA and VCCGT to SLEW_FAST_4
- Set FastPkgCRampDisable VCCIA and VCCGT to 1

BUG=None
TEST=FW_NAME=xol emerge-brya coreboot chromeos-bootimage

Change-Id: I6165ae6ca73d1467a1d2cc7bd545298bd4c2f54f
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81103
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Seunghwan Kim 2024-03-07 15:18:21 +09:00 committed by Martin L Roth
parent f02e00a97a
commit aba7a34df2
1 changed files with 7 additions and 0 deletions
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7
src/mainboard/google/brya/variants/xol/overridetree.cb
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@ -10,6 +10,13 @@ chip soc/intel/alderlake
.enable_fast_vmode = 1, .enable_fast_vmode = 1,
}" }"
# Acoustic settings
register "acoustic_noise_mitigation" = "1"
register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_4"
register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_4"
register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
register "sagv" = "SaGv_Enabled" register "sagv" = "SaGv_Enabled"
register "pch_slp_a_min_assertion_width" = "SLP_A_ASSERTION_DEFAULT" register "pch_slp_a_min_assertion_width" = "SLP_A_ASSERTION_DEFAULT"