util/ifdtool: Add support for Denverton SoC
Denverton is a special version of IFD2 flash layout. It defines 10GbE firmware regions (11/12) and the IE (10) region which other IFD2 platforms do not have. Denverton does not include the legacy GbE region (3) or the EC region (8) which other IFD2 platforms do have. TEST='ifdtool -p dnv coreboot.rom' and verify correct output Signed-off-by: Jeff Daly <jeffd@silicom-usa.com> Change-Id: I15939ce4672123f39a807d63c13ba7df98c57523 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60830 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -45,6 +45,7 @@ enum ich_chipset {
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CHIPSET_500_600_SERIES_TIGER_ALDER_POINT, /* 11th-12th gen Core i/o (LP)
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* variants onwards */
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CHIPSET_C620_SERIES_LEWISBURG,
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CHIPSET_DENVERTON,
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};
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enum platform {
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@ -59,6 +60,7 @@ enum platform {
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PLATFORM_TGL,
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PLATFORM_ADL,
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PLATFORM_IFD2,
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PLATFORM_DNV,
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};
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#define LAYOUT_LINELEN 80
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@ -171,6 +173,7 @@ typedef struct {
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uint32_t flmstr3;
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uint32_t flmstr4;
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uint32_t flmstr5;
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uint32_t flmstr6;
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} __attribute__((packed)) fmba_t;
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// processor strap
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