util/ifdtool: Add support for Denverton SoC

Denverton is a special version of IFD2 flash layout.  It defines
10GbE firmware regions (11/12) and the IE (10) region which
other IFD2 platforms do not have.  Denverton does not include the
legacy GbE region (3) or the EC region (8) which other IFD2
platforms do have.

TEST='ifdtool -p dnv coreboot.rom' and verify correct output

Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
Change-Id: I15939ce4672123f39a807d63c13ba7df98c57523
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60830
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Jeff Daly
2022-01-06 00:52:30 -05:00
committed by Felix Held
parent 5ff5225962
commit abd4b96eb4
3 changed files with 77 additions and 11 deletions

View File

@ -45,6 +45,7 @@ enum ich_chipset {
CHIPSET_500_600_SERIES_TIGER_ALDER_POINT, /* 11th-12th gen Core i/o (LP)
* variants onwards */
CHIPSET_C620_SERIES_LEWISBURG,
CHIPSET_DENVERTON,
};
enum platform {
@ -59,6 +60,7 @@ enum platform {
PLATFORM_TGL,
PLATFORM_ADL,
PLATFORM_IFD2,
PLATFORM_DNV,
};
#define LAYOUT_LINELEN 80
@ -171,6 +173,7 @@ typedef struct {
uint32_t flmstr3;
uint32_t flmstr4;
uint32_t flmstr5;
uint32_t flmstr6;
} __attribute__((packed)) fmba_t;
// processor strap