sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

nb/intel/haswell/northbridge.c: Drop stale comment

Browse Source 
This can now be controlled with the `MMCONF_BUS_NUMBER` Kconfig option.

Change-Id: If0fdefc5b4339acc843443c551892b397ed39c2e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58922
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Angel Pons
2021-11-03 17:12:55 +01:00
committed by Werner Zeh
parent 5d4f0838d6
commit abe5632b67
1 changed files with 0 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/northbridge/intel/haswell/northbridge.c
View File

@ -34,10 +34,6 @@ static const char *northbridge_acpi_name(const struct device *dev)
return NULL; return NULL;
} }
/*
* TODO: We could determine how many PCIe buses we need in the bar.
* For now, that number is hardcoded to a max of 64.
*/
static struct device_operations pci_domain_ops = { static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources, .read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources, .set_resources = pci_domain_set_resources,