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newconfig is no more.

Browse Source 
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi
2010-02-07 21:43:48 +00:00
parent 389240f288
commit abf2ad716d
653 changed files with 15 additions and 64257 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/cpu/amd/dualcore/Config.lb
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@ -1 +0,0 @@
object amd_sibling.o

1
src/cpu/amd/microcode/Config.lb
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@ -1 +0,0 @@
object microcode.o

38
src/cpu/amd/model_10xxx/Config.lb
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@ -1,38 +0,0 @@
#
# This file is part of the coreboot project.
#
# Copyright (C) 2007 Advanced Micro Devices, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
uses CONFIG_HAVE_INIT_TIMER
uses CONFIG_HAVE_MOVNTI
uses CONFIG_CPU_ADDR_BITS
default CONFIG_HAVE_INIT_TIMER=1
default CONFIG_HAVE_MOVNTI=1
default CONFIG_CPU_ADDR_BITS=48
dir /cpu/x86/tsc
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/pae
dir /cpu/x86/smm
dir /cpu/amd/mtrr
dir /cpu/amd/quadcore
dir /cpu/amd/microcode
driver model_10xxx_init.o
object update_microcode.o
object apic_timer.o
object processor_name.o

20
src/cpu/amd/model_fxx/Config.lb
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@ -1,20 +0,0 @@
uses CONFIG_HAVE_INIT_TIMER
uses CONFIG_HAVE_MOVNTI
uses CONFIG_CPU_ADDR_BITS
default CONFIG_HAVE_INIT_TIMER=1
default CONFIG_HAVE_MOVNTI=1
default CONFIG_CPU_ADDR_BITS=40
dir /cpu/x86/tsc
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/pae
dir /cpu/x86/smm
dir /cpu/amd/mtrr
dir /cpu/amd/dualcore
dir /cpu/amd/microcode
driver model_fxx_init.o
object apic_timer.o
object model_fxx_update_microcode.o
object processor_name.o
object powernow_acpi.o

5
src/cpu/amd/model_gx1/Config.lb
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@ -1,5 +0,0 @@
dir /cpu/x86/tsc
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
driver model_gx1_init.o

7
src/cpu/amd/model_gx2/Config.lb
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@ -1,7 +0,0 @@
dir /cpu/x86/tsc
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
driver model_gx2_init.o
object cpubug.o
object vsmsetup.o

7
src/cpu/amd/model_lx/Config.lb
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@ -1,7 +0,0 @@
dir /cpu/x86/tsc
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
driver model_lx_init.o
object cpubug.o
object vsmsetup.o

2
src/cpu/amd/mtrr/Config.lb
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@ -1,2 +0,0 @@
dir /cpu/x86/mtrr
object amd_mtrr.o

20
src/cpu/amd/quadcore/Config.lb
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@ -1,20 +0,0 @@
#
# This file is part of the coreboot project.
#
# Copyright (C) 2007 Advanced Micro Devices, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
object amd_sibling.o

3
src/cpu/amd/sc520/Config.lb
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@ -1,3 +0,0 @@
config chip.h
object sc520.o

4
src/cpu/amd/socket_754/Config.lb
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@ -1,4 +0,0 @@
config chip.h
object socket_754.o
dir /cpu/amd/model_fxx

5
src/cpu/amd/socket_939/Config.lb
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@ -1,5 +0,0 @@
config chip.h
object socket_939.o
dir /cpu/amd/model_fxx

5
src/cpu/amd/socket_940/Config.lb
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@ -1,5 +0,0 @@
config chip.h
object socket_940.o
dir /cpu/amd/model_fxx

16
src/cpu/amd/socket_AM2/Config.lb
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@ -1,16 +0,0 @@
uses CONFIG_K8_REV_F_SUPPORT
uses CONFIG_K8_HT_FREQ_1G_SUPPORT
uses CONFIG_DIMM_SUPPORT
uses CONFIG_CPU_SOCKET_TYPE
config chip.h
default CONFIG_K8_REV_F_SUPPORT=1
#Opteron K8 1G HT Support
default CONFIG_K8_HT_FREQ_1G_SUPPORT=1
default CONFIG_DIMM_SUPPORT=0x0004 #DDR2 unbuffered
default CONFIG_CPU_SOCKET_TYPE=0x11
object socket_AM2.o
dir /cpu/amd/model_fxx

51
src/cpu/amd/socket_AM2r2/Config.lb
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@ -1,51 +0,0 @@
#
# This file is part of the coreboot project.
#
# Copyright (C) 2007 Advanced Micro Devices, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
uses CONFIG_PCI_IO_CFG_EXT
uses CONFIG_MMCONF_SUPPORT
uses CONFIG_HT3_SUPPORT
uses CONFIG_EXT_RT_TBL_SUPPORT
uses CONFIG_EXT_CONF_SUPPORT
uses CONFIG_DIMM_SUPPORT
uses CONFIG_CPU_SOCKET_TYPE
uses CONFIG_CBB
uses CONFIG_CDB
uses CONFIG_PCI_BUS_SEGN_BITS
config chip.h
default CONFIG_PCI_IO_CFG_EXT=1
default CONFIG_HT3_SUPPORT=1
default CONFIG_EXT_RT_TBL_SUPPORT=0
default CONFIG_EXT_CONF_SUPPORT=0
default CONFIG_DIMM_SUPPORT=0x0104 #DDR2 and REG
default CONFIG_CPU_SOCKET_TYPE=0x11
if CONFIG_EXT_RT_TBL_SUPPORT
default CONFIG_CBB=0xff
default CONFIG_CDB=0
end
#default CONFIG_MMCONF_SUPPORT=1
#default CONFIG_MMCONF_SUPPORT_DEFAULT=1
object socket_AM2r2.o
dir /cpu/amd/model_10xxx

16
src/cpu/amd/socket_F/Config.lb
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@ -1,16 +0,0 @@
uses CONFIG_K8_REV_F_SUPPORT
uses CONFIG_K8_HT_FREQ_1G_SUPPORT
uses CONFIG_DIMM_SUPPORT
uses CONFIG_CPU_SOCKET_TYPE
config chip.h
default CONFIG_K8_REV_F_SUPPORT=1
#Opteron K8 1G HT Support
default CONFIG_K8_HT_FREQ_1G_SUPPORT=1
default CONFIG_DIMM_SUPPORT=0x0104 #DDR2 and REG
default CONFIG_CPU_SOCKET_TYPE=0x10
object socket_F.o
dir /cpu/amd/model_fxx

51
src/cpu/amd/socket_F_1207/Config.lb
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@ -1,51 +0,0 @@
#
# This file is part of the coreboot project.
#
# Copyright (C) 2007 Advanced Micro Devices, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
uses CONFIG_PCI_IO_CFG_EXT
uses CONFIG_MMCONF_SUPPORT
uses CONFIG_HT3_SUPPORT
uses CONFIG_EXT_RT_TBL_SUPPORT
uses CONFIG_EXT_CONF_SUPPORT
uses CONFIG_DIMM_SUPPORT
uses CONFIG_CPU_SOCKET_TYPE
uses CONFIG_CBB
uses CONFIG_CDB
uses CONFIG_PCI_BUS_SEGN_BITS
config chip.h
default CONFIG_PCI_IO_CFG_EXT=1
default CONFIG_HT3_SUPPORT=1
default CONFIG_EXT_RT_TBL_SUPPORT=0
default CONFIG_EXT_CONF_SUPPORT=0
default CONFIG_DIMM_SUPPORT=0x0104 #DDR2 and REG
default CONFIG_CPU_SOCKET_TYPE=0x10
if CONFIG_EXT_RT_TBL_SUPPORT
default CONFIG_CBB=0xff
default CONFIG_CDB=0
end
#default CONFIG_MMCONF_SUPPORT=1
#default CONFIG_MMCONF_SUPPORT_DEFAULT=1
object socket_F_1207.o
dir /cpu/amd/model_10xxx

16
src/cpu/amd/socket_S1G1/Config.lb
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@ -1,16 +0,0 @@
uses CONFIG_K8_REV_F_SUPPORT
uses CONFIG_K8_HT_FREQ_1G_SUPPORT
uses CONFIG_DIMM_SUPPORT
uses CONFIG_CPU_SOCKET_TYPE
config chip.h
default CONFIG_K8_REV_F_SUPPORT=1
#Opteron K8 1G HT Support
default CONFIG_K8_HT_FREQ_1G_SUPPORT=1
default CONFIG_DIMM_SUPPORT=0x0204 #DDR2 and REG, S1G1
default CONFIG_CPU_SOCKET_TYPE=0x12
object socket_S1G1.o
dir /cpu/amd/model_fxx

2
src/cpu/emulation/qemu-x86/Config.lb
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@ -1,2 +0,0 @@
config chip.h
object northbridge.o

3
src/cpu/intel/bga956/Config.lb
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@ -1,3 +0,0 @@
config chip.h
object bga956.o
dir /cpu/intel/model_1067x

28
src/cpu/intel/ep80579/Config.lb
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@ -1,28 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2008 Arastra, Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License version 2 as
## published by the Free Software Foundation.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config chip.h
object ep80579.o
dir /cpu/x86/tsc
dir /cpu/x86/mtrr
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
dir /cpu/intel/microcode
driver ep80579_init.o

1
src/cpu/intel/hyperthreading/Config.lb
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@ -1 +0,0 @@
object intel_sibling.o

1
src/cpu/intel/microcode/Config.lb
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@ -1 +0,0 @@
object microcode.o

11
src/cpu/intel/model_1067x/Config.lb
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@ -1,11 +0,0 @@
uses CONFIG_HAVE_MOVNTI
default CONFIG_HAVE_MOVNTI=1
dir /cpu/x86/tsc
dir /cpu/x86/mtrr
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
dir /cpu/intel/microcode
dir /cpu/intel/hyperthreading
driver model_1067x_init.o

31
src/cpu/intel/model_106cx/Config.lb
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@ -1,31 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2009 coresystems GmbH
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
uses CONFIG_HAVE_MOVNTI
default CONFIG_HAVE_MOVNTI=1
dir /cpu/x86/tsc
dir /cpu/x86/mtrr
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
dir /cpu/intel/microcode
dir /cpu/intel/hyperthreading
dir /cpu/intel/speedstep
driver model_106cx_init.o

7
src/cpu/intel/model_69x/Config.lb
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@ -1,7 +0,0 @@
dir /cpu/x86/tsc
dir /cpu/x86/mtrr
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
dir /cpu/intel/microcode
driver model_69x_init.o

7
src/cpu/intel/model_6dx/Config.lb
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@ -1,7 +0,0 @@
dir /cpu/x86/tsc
dir /cpu/x86/mtrr
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
dir /cpu/intel/microcode
driver model_6dx_init.o

12
src/cpu/intel/model_6ex/Config.lb
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@ -1,12 +0,0 @@
uses CONFIG_HAVE_MOVNTI
default CONFIG_HAVE_MOVNTI=1
dir /cpu/x86/tsc
dir /cpu/x86/mtrr
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
dir /cpu/intel/microcode
dir /cpu/intel/hyperthreading
dir /cpu/intel/speedstep
driver model_6ex_init.o

11
src/cpu/intel/model_6fx/Config.lb
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@ -1,11 +0,0 @@
uses CONFIG_HAVE_MOVNTI
default CONFIG_HAVE_MOVNTI=1
dir /cpu/x86/tsc
dir /cpu/x86/mtrr
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
dir /cpu/intel/microcode
dir /cpu/intel/hyperthreading
driver model_6fx_init.o

7
src/cpu/intel/model_6xx/Config.lb
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@ -1,7 +0,0 @@
dir /cpu/x86/tsc
dir /cpu/x86/mtrr
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
dir /cpu/intel/microcode
driver model_6xx_init.o

9
src/cpu/intel/model_f0x/Config.lb
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@ -1,9 +0,0 @@
uses CONFIG_HAVE_MOVNTI
default CONFIG_HAVE_MOVNTI=1
dir /cpu/x86/tsc
dir /cpu/x86/mtrr
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
dir /cpu/intel/microcode
driver model_f0x_init.o

9
src/cpu/intel/model_f1x/Config.lb
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@ -1,9 +0,0 @@
uses CONFIG_HAVE_MOVNTI
default CONFIG_HAVE_MOVNTI=1
dir /cpu/x86/tsc
dir /cpu/x86/mtrr
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
dir /cpu/intel/microcode
driver model_f1x_init.o

10
src/cpu/intel/model_f2x/Config.lb
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@ -1,10 +0,0 @@
uses CONFIG_HAVE_MOVNTI
default CONFIG_HAVE_MOVNTI=1
dir /cpu/x86/tsc
dir /cpu/x86/mtrr
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
dir /cpu/intel/microcode
dir /cpu/intel/hyperthreading
driver model_f2x_init.o

10
src/cpu/intel/model_f3x/Config.lb
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@ -1,10 +0,0 @@
uses CONFIG_HAVE_MOVNTI
default CONFIG_HAVE_MOVNTI=1
dir /cpu/x86/tsc
dir /cpu/x86/mtrr
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
dir /cpu/intel/microcode
dir /cpu/intel/hyperthreading
driver model_f3x_init.o

10
src/cpu/intel/model_f4x/Config.lb
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@ -1,10 +0,0 @@
uses CONFIG_HAVE_MOVNTI
default CONFIG_HAVE_MOVNTI=1
dir /cpu/x86/tsc
dir /cpu/x86/mtrr
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
dir /cpu/intel/microcode
dir /cpu/intel/hyperthreading
driver model_f4x_init.o

3
src/cpu/intel/slot_2/Config.lb
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@ -1,3 +0,0 @@
config chip.h
object slot_2.o
dir /cpu/intel/model_6xx

22
src/cpu/intel/socket_441/Config.lb
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@ -1,22 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2009 coresystems GmbH
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config chip.h
object socket_441.o
dir /cpu/intel/model_106cx

3
src/cpu/intel/socket_PGA370/Config.lb
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@ -1,3 +0,0 @@
config chip.h
object socket_PGA370.o
dir /cpu/intel/model_6xx

6
src/cpu/intel/socket_mFCPGA478/Config.lb
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@ -1,6 +0,0 @@
config chip.h
object socket_mFCPGA478.o
dir /cpu/intel/model_69x
dir /cpu/intel/model_6dx
dir /cpu/intel/model_6ex
dir /cpu/intel/model_6fx

4
src/cpu/intel/socket_mPGA478/Config.lb
View File

@ -1,4 +0,0 @@
config chip.h
object socket_mPGA478.o
dir /cpu/intel/model_69x
dir /cpu/intel/model_6dx

4
src/cpu/intel/socket_mPGA479M/Config.lb
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@ -1,4 +0,0 @@
config chip.h
object socket_mPGA479M.o
dir /cpu/intel/model_69x
dir /cpu/intel/model_6dx

6
src/cpu/intel/socket_mPGA603/Config.lb
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@ -1,6 +0,0 @@
config chip.h
object socket_mPGA603_400Mhz.o
dir /cpu/intel/model_f0x
dir /cpu/intel/model_f1x
dir /cpu/intel/model_f2x

5
src/cpu/intel/socket_mPGA604/Config.lb
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@ -1,5 +0,0 @@
config chip.h
object socket_mPGA604.o
dir /cpu/intel/model_f2x
dir /cpu/intel/model_f3x
dir /cpu/intel/model_f4x

1
src/cpu/intel/speedstep/Config.lb
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@ -1 +0,0 @@
object acpi.o

28
src/cpu/via/model_c3/Config.lb
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@ -1,28 +0,0 @@
#
# This file is part of the coreboot project.
#
# (C) 2007-2008 coresystems GmbH
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
# MA 02110-1301 USA
#
dir /cpu/x86/tsc
dir /cpu/x86/mtrr
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
dir /cpu/intel/microcode
driver model_c3_init.o

28
src/cpu/via/model_c7/Config.lb
View File

@ -1,28 +0,0 @@
#
# This file is part of the coreboot project.
#
# (C) 2007-2008 coresystems GmbH
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; version 2 of
# the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
# MA 02110-1301 USA
#
dir /cpu/x86/tsc
dir /cpu/x86/mtrr
dir /cpu/x86/lapic
dir /cpu/x86/cache
dir /cpu/x86/smm
dir /cpu/intel/microcode
driver model_c7_init.o

1
src/cpu/x86/cache/Config.lb vendored
View File

@ -1 +0,0 @@
object cache.o

11
src/cpu/x86/lapic/Config.lb
View File

@ -1,11 +0,0 @@
uses CONFIG_UDELAY_LAPIC
object lapic.o
object lapic_cpu_init.o
object secondary.S
if CONFIG_UDELAY_LAPIC
default CONFIG_HAVE_INIT_TIMER=1
object apic_timer.o
end

1
src/cpu/x86/mtrr/Config.lb
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@ -1 +0,0 @@
object mtrr.o

1
src/cpu/x86/pae/Config.lb
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@ -1 +0,0 @@
object pgtbl.o

48
src/cpu/x86/smm/Config.lb
View File

@ -1,48 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2008 coresystems GmbH
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
uses CONFIG_HAVE_SMI_HANDLER
if CONFIG_HAVE_SMI_HANDLER
object smmrelocate.S
smmobject smmhandler.S
smmobject smihandler.o
smmobject smiutil.o
makerule smm.o
depends "$(SMM-OBJECTS) src/console/printk.o src/console/vtxprintf.o $(LIBGCC_FILE_NAME)"
action "$(CC) $(DISTRO_LFLAGS) -nostdlib -r -o $@ $^"
end
makerule smm
depends "smm.o $(TOP)/src/cpu/x86/smm/smm.ld ldoptions"
action "$(CC) $(DISTRO_LFLAGS) -nostdlib -nostartfiles -static -o smm.elf -T $(TOP)/src/cpu/x86/smm/smm.ld smm.o"
action "$(CONFIG_CROSS_COMPILE)nm -n smm.elf | sort > smm.map"
action "$(CONFIG_OBJCOPY) -O binary smm.elf smm"
end
makerule smm_bin.c
depends "smm"
action "(echo 'unsigned char smm[] = {'; od -vtx1 smm | sed -e 's,^[0-9]* *,,' -e 's:[0-9a-f][0-9a-f] :0x&,:g' -e 's:[0-9a-f][0-9a-f]$$:0x&,:'; echo '}; unsigned int smm_len = '; wc -c smm |awk '{print $$1;}' ; echo ';') > smm_bin.c"
end
object ./smm_bin.o
end

9
src/cpu/x86/tsc/Config.lb
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@ -1,9 +0,0 @@
uses CONFIG_UDELAY_TSC
uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
uses CONFIG_HAVE_INIT_TIMER
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=0
if CONFIG_UDELAY_TSC
default CONFIG_HAVE_INIT_TIMER=1
object delay_tsc.o
end