soc/amd/picasso: Allow modification of i2c base addresses in PSP
BUG=b:158124527 TEST=Build & boot psp_verstage on trembyle Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I45380e0c61e1bb7a94a96630e5867b7ffca0909c Reviewed-on: https://review.coreboot.org/c/coreboot/+/42064 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -13,9 +13,7 @@
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#include <soc/southbridge.h>
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#include <soc/southbridge.h>
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#include "chip.h"
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#include "chip.h"
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/*
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#if ENV_X86
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* We don't have addresses for I2C0-1.
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*/
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static const uintptr_t i2c_bus_address[I2C_MASTER_DEV_COUNT + I2C_SLAVE_DEV_COUNT] = {
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static const uintptr_t i2c_bus_address[I2C_MASTER_DEV_COUNT + I2C_SLAVE_DEV_COUNT] = {
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0,
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0,
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0,
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0,
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@ -23,6 +21,9 @@ static const uintptr_t i2c_bus_address[I2C_MASTER_DEV_COUNT + I2C_SLAVE_DEV_COUN
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APU_I2C3_BASE,
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APU_I2C3_BASE,
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APU_I2C4_BASE, /* Can only be used in slave mode */
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APU_I2C4_BASE, /* Can only be used in slave mode */
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};
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};
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#else
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static uintptr_t i2c_bus_address[I2C_MASTER_DEV_COUNT + I2C_SLAVE_DEV_COUNT];
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#endif
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uintptr_t dw_i2c_base_address(unsigned int bus)
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uintptr_t dw_i2c_base_address(unsigned int bus)
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{
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{
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@ -32,6 +33,18 @@ uintptr_t dw_i2c_base_address(unsigned int bus)
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return i2c_bus_address[bus];
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return i2c_bus_address[bus];
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}
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}
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#if !ENV_X86
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void i2c_set_bar(unsigned int bus, uintptr_t bar)
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{
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if (bus >= ARRAY_SIZE(i2c_bus_address)) {
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printk(BIOS_ERR, "Error: i2c index out of bounds: %u.", bus);
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return;
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}
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i2c_bus_address[bus] = bar;
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}
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#endif
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const struct dw_i2c_bus_config *dw_i2c_get_soc_cfg(unsigned int bus)
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const struct dw_i2c_bus_config *dw_i2c_get_soc_cfg(unsigned int bus)
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{
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{
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const struct soc_amd_picasso_config *config;
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const struct soc_amd_picasso_config *config;
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@ -47,28 +60,23 @@ const struct dw_i2c_bus_config *dw_i2c_get_soc_cfg(unsigned int bus)
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static const char *i2c_acpi_name(const struct device *dev)
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static const char *i2c_acpi_name(const struct device *dev)
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{
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{
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switch (dev->path.mmio.addr) {
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if ((uintptr_t)dev->path.mmio.addr == i2c_bus_address[2])
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case APU_I2C2_BASE:
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return "I2C2";
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return "I2C2";
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case APU_I2C3_BASE:
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else if ((uintptr_t)dev->path.mmio.addr == i2c_bus_address[3])
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return "I2C3";
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return "I2C3";
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case APU_I2C4_BASE:
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else if ((uintptr_t)dev->path.mmio.addr == i2c_bus_address[4])
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return "I2C4";
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return "I2C4";
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default:
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return NULL;
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return NULL;
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}
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}
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}
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int dw_i2c_soc_dev_to_bus(const struct device *dev)
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int dw_i2c_soc_dev_to_bus(const struct device *dev)
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{
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{
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switch (dev->path.mmio.addr) {
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if ((uintptr_t)dev->path.mmio.addr == i2c_bus_address[2])
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case APU_I2C2_BASE:
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return 2;
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return 2;
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case APU_I2C3_BASE:
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else if ((uintptr_t)dev->path.mmio.addr == i2c_bus_address[3])
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return 3;
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return 3;
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case APU_I2C4_BASE:
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else if ((uintptr_t)dev->path.mmio.addr == i2c_bus_address[4])
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return 4;
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return 4;
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}
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return -1;
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return -1;
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}
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}
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@ -22,4 +22,7 @@ struct soc_amd_i2c_save {
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void sb_reset_i2c_slaves(void);
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void sb_reset_i2c_slaves(void);
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/* Sets the base address for the specific I2C bus. */
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void i2c_set_bar(unsigned int bus, uintptr_t bar);
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#endif /* __PICASSO_I2C_H__ */
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#endif /* __PICASSO_I2C_H__ */
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