From acb17fec34a609c5b674ad0d2af04d47800530e2 Mon Sep 17 00:00:00 2001 From: Kevin Chang Date: Wed, 8 Dec 2021 15:29:40 +0800 Subject: [PATCH] mb/google/brya/var/taeko: Fix PLD group order (W/A) In commit 667471b8d8 (ec/google/chromeec: Add PLD to EC conn in ACPI table), PLD is added to ACPI table. It causes the DUT to not boot into the OS. So fix the USB3/USB2 Type-C Port C2 PLD group order from 3 to 2 to solve this issue. Fixes: 667471b8d8 ("ec/google/chromeec: Add PLD to EC conn in ACPI table") BUG=b:209723556 BRANCH=none TEST=build coreboot and boot into OS. Signed-off-by: Kevin Chang Change-Id: Ia4cf2d735de524ae721800600536923d1d47f04b Reviewed-on: https://review.coreboot.org/c/coreboot/+/59973 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/mainboard/google/brya/variants/taeko/overridetree.cb | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb index d485662c67..ff4feefe9e 100644 --- a/src/mainboard/google/brya/variants/taeko/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb @@ -443,7 +443,7 @@ chip soc/intel/alderlake chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C1 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(3, 1)" + register "group" = "ACPI_PLD_GROUP(2, 1)" device ref tcss_usb3_port3 on probe DB_USB DB_USB3_NO_A end @@ -463,7 +463,7 @@ chip soc/intel/alderlake chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C1 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(3, 1)" + register "group" = "ACPI_PLD_GROUP(2, 1)" device ref usb2_port3 on probe DB_USB DB_USB3_NO_A end