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mb/google/brask/var/bujia: remove DPTF fan control

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Fan control is assign to EC handle now. Remove relate setting on coreboot.

BUG=b:351917517
BRANCH=firmware-brya-14505.B
TEST= USE="-project_all project_bujia" emerge-brask coreboot

Change-Id: Iff0776ce3db6f27e250162357abb3c7e9b1a0dc3
Signed-off-by: Shon <shon.wang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83380
Reviewed-by: Derek Huang <derekhuang@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
This commit is contained in:
Shon 2024-07-09 09:19:35 +08:00 committed by Felix Held
parent 88bc0f1604
commit acf5d16e15
1 changed files with 0 additions and 31 deletions
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31
src/mainboard/google/brya/variants/bujia/overridetree.cb
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@ -68,19 +68,6 @@ chip soc/intel/alderlake
register "options.tsr[2].desc" = ""Wireless""
register "options.tsr[3].desc" = ""Memory""
# TODO: below values are initial reference values only
## Active Policy
register "policies.active" = "{
[0] = {
.target = DPTF_CPU,
.thresholds = {
TEMP_PCT(85, 90),
TEMP_PCT(80, 80),
TEMP_PCT(75, 70),
}
}
}"
## Passive Policy
register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
@ -122,24 +109,6 @@ chip soc/intel/alderlake
[3] = { 8, 500 }
}"
## Fan Performance Control (Percent, Speed, Noise, Power)
register "controls.fan_perf" = "{
[0] = { 90, 6700, 220, 2200, },
[1] = { 80, 5800, 180, 1800, },
[2] = { 70, 5000, 145, 1450, },
[3] = { 60, 4900, 115, 1150, },
[4] = { 50, 3838, 90, 900, },
[5] = { 40, 2904, 55, 550, },
[6] = { 30, 2337, 30, 300, },
[7] = { 20, 1608, 15, 150, },
[8] = { 10, 800, 10, 100, },
[9] = { 0, 0, 0, 50, }
}"
## Fan options
register "options.fan.fine_grained_control" = "1"
register "options.fan.step_size" = "2"
device generic 0 alias dptf_policy on end
end
end