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timestamps: Rename timestamps to make names more consistent

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This patch aims to make timestamps more consistent in naming,
to follow one pattern. Until now there were many naming patterns:
- TS_START_*/TS_END_*
- TS_BEFORE_*/TS_AFTER_*
- TS_*_START/TS_*_END
This change also aims to indicate, that these timestamps can be used
to create time-ranges, e.g. from TS_BOOTBLOCK_START to TS_BOOTBLOCK_END.

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I533e32392224d9b67c37e6a67987b09bf1cf51c6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62019
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Jakub Czapiga
2022-02-15 11:50:31 +01:00
committed by Felix Held
parent e96ade6981
commit ad6157ebdf
52 changed files with 276 additions and 276 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
src/drivers/intel/fsp1_1/fsp_util.c
View File

@@ -134,17 +134,17 @@ void fsp_notify(u32 phase)
notify_phase_params.Phase = phase;
if (phase == EnumInitPhaseReadyToBoot) {
timestamp_add_now(TS_FSP_BEFORE_FINALIZE);
timestamp_add_now(TS_FSP_FINALIZE_START);
post_code(POST_FSP_NOTIFY_BEFORE_FINALIZE);
} else {
timestamp_add_now(TS_FSP_BEFORE_ENUMERATE);
timestamp_add_now(TS_FSP_ENUMERATE_START);
post_code(POST_FSP_NOTIFY_BEFORE_ENUMERATE);
}
status = notify_phase_proc(&notify_phase_params);
timestamp_add_now(phase == EnumInitPhaseReadyToBoot ?
TS_FSP_AFTER_FINALIZE : TS_FSP_AFTER_ENUMERATE);
TS_FSP_FINALIZE_END : TS_FSP_ENUMERATE_END);
if (status != 0)
printk(BIOS_ERR, "FSP API NotifyPhase failed for phase 0x%x with status: 0x%x\n",

6
src/drivers/intel/fsp1_1/romstage.c
View File

@@ -26,7 +26,7 @@ static void raminit_common(struct romstage_params *params)
post_code(0x32);
timestamp_add_now(TS_BEFORE_INITRAM);
timestamp_add_now(TS_INITRAM_START);
s3wake = params->power_state->prev_sleep_state == ACPI_S3;
@@ -66,7 +66,7 @@ static void raminit_common(struct romstage_params *params)
/* Initialize RAM */
raminit(params);
timestamp_add_now(TS_AFTER_INITRAM);
timestamp_add_now(TS_INITRAM_END);
/* Save MRC output */
if (CONFIG(CACHE_MRC_SETTINGS)) {
@@ -100,7 +100,7 @@ void cache_as_ram_stage_main(FSP_INFO_HEADER *fih)
post_code(0x30);
timestamp_add_now(TS_START_ROMSTAGE);
timestamp_add_now(TS_ROMSTAGE_START);
/* Display parameters */
if (!CONFIG(NO_ECAM_MMCONF_SUPPORT))

4
src/drivers/intel/fsp2_0/memory_init.c
View File

@@ -380,9 +380,9 @@ void fsp_memory_init(bool s3wake)
die("FSPM XIP base does not match: %p vs %p\n",
(void *)(uintptr_t)hdr->image_base, prog_start(&fspld.fsp_prog));
timestamp_add_now(TS_BEFORE_INITRAM);
timestamp_add_now(TS_INITRAM_START);
do_fsp_memory_init(&context, s3wake);
timestamp_add_now(TS_AFTER_INITRAM);
timestamp_add_now(TS_INITRAM_END);
}

12
src/drivers/intel/fsp2_0/notify.c
View File

@@ -23,24 +23,24 @@ static const struct fsp_notify_phase_data notify_data[] = {
.skip = !CONFIG(USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM),
.post_code_before = POST_FSP_NOTIFY_BEFORE_ENUMERATE,
.post_code_after = POST_FSP_NOTIFY_AFTER_ENUMERATE,
.timestamp_before = TS_FSP_BEFORE_ENUMERATE,
.timestamp_after = TS_FSP_AFTER_ENUMERATE,
.timestamp_before = TS_FSP_ENUMERATE_START,
.timestamp_after = TS_FSP_ENUMERATE_END,
},
{
.notify_phase = READY_TO_BOOT,
.skip = !CONFIG(USE_FSP_NOTIFY_PHASE_READY_TO_BOOT),
.post_code_before = POST_FSP_NOTIFY_BEFORE_FINALIZE,
.post_code_after = POST_FSP_NOTIFY_AFTER_FINALIZE,
.timestamp_before = TS_FSP_BEFORE_FINALIZE,
.timestamp_after = TS_FSP_AFTER_FINALIZE,
.timestamp_before = TS_FSP_FINALIZE_START,
.timestamp_after = TS_FSP_FINALIZE_END,
},
{
.notify_phase = END_OF_FIRMWARE,
.skip = !CONFIG(USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE),
.post_code_before = POST_FSP_NOTIFY_BEFORE_END_OF_FIRMWARE,
.post_code_after = POST_FSP_NOTIFY_AFTER_END_OF_FIRMWARE,
.timestamp_before = TS_FSP_BEFORE_END_OF_FIRMWARE,
.timestamp_after = TS_FSP_AFTER_END_OF_FIRMWARE,
.timestamp_before = TS_FSP_END_OF_FIRMWARE_START,
.timestamp_after = TS_FSP_END_OF_FIRMWARE_END,
},
};