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Correct FSB reading in speedstep ACPI

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We parsed the MSR the wrong way, and didn't support some valid values.

Change-Id: Ia42e3de05dd76b6830aaa310ec82031d36def3a0
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1656
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Nico Huber 2012-09-06 17:46:30 +02:00 committed by Stefan Reinauer
parent 336db54a00
commit ad874e3477
1 changed files with 3 additions and 1 deletions
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4
src/cpu/intel/speedstep/acpi.c
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@ -49,13 +49,15 @@ static int determine_total_number_of_cores(void)
static int get_fsb(void) static int get_fsb(void)
{ {
u32 fsbcode=(rdmsr(0xcd).lo >> 4) & 7; const u32 fsbcode = rdmsr(0xcd).lo & 7;
switch (fsbcode) { switch (fsbcode) {
case 0: return 266; case 0: return 266;
case 1: return 133; case 1: return 133;
case 2: return 200; case 2: return 200;
case 3: return 166; case 3: return 166;
case 4: return 333;
case 5: return 100; case 5: return 100;
case 6: return 400;
} }
printk(BIOS_DEBUG, "Warning: No supported FSB frequency. Assuming 200MHz\n"); printk(BIOS_DEBUG, "Warning: No supported FSB frequency. Assuming 200MHz\n");
return 200; return 200;