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libpayload arm64: Add support for mmu

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Adds support for initializing mmu, setting up dma areas and enabling mmu based
on the memranges passed on in the coreboot tables.

CQ-DEPEND=CL:216826
BUG=chrome-os-partner:31634
BRANCH=None
TEST=Compiles successfully

Change-Id: Id41a4255f1cd45a9455840f1eaa53503bd6fef3f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f2c6676bf51fcd85b61e9e08a261634a78137c4c
Original-Change-Id: I217bc5a5aff6a1fc0809c769822d820316d5c434
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/216823
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8791
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Furquan Shaikh
2014-09-04 15:32:17 -07:00
committed by Patrick Georgi
parent cc51256c74
commit adabbe5e20
5 changed files with 832 additions and 27 deletions
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24
payloads/libpayload/arch/arm64/cache.c
View File

@@ -117,30 +117,6 @@ void dcache_invalidate_by_mva(void const *addr, size_t len)
dcache_op_va(addr, len, OP_DCIVAC);
}
/*
* CAUTION: This implementation assumes that coreboot never uses non-identity
* page tables for pages containing executed code. If you ever want to violate
* this assumption, have fun figuring out the associated problems on your own.
*/
void dcache_mmu_disable(void)
{
uint32_t sctlr;
dcache_clean_invalidate_all();
sctlr = raw_read_sctlr_current();
sctlr &= ~(SCTLR_C | SCTLR_M);
raw_write_sctlr_current(sctlr);
}
void dcache_mmu_enable(void)
{
uint32_t sctlr;
sctlr = raw_read_sctlr_current();
sctlr |= SCTLR_C | SCTLR_M;
raw_write_sctlr_current(sctlr);
}
void cache_sync_instructions(void)
{
dcache_clean_all(); /* includes trailing DSB (in assembly) */