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AGESA: Clean separation of SPI flash

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To be precise, wakeup from S3 does not involve SPI writing, while
preparing for it on cold power-ons currently does.

For S3DataTypeMtrr storage is changed such that the first 4 bytes
is the length of data stored like with the other two S3DataType.

Change-Id: Id920650474530d4191075da4ef70daa66c904c5b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6085
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
This commit is contained in:
Kyösti Mälkki
2014-06-19 16:51:54 +03:00
parent 23b4f0c734
commit adf3d6ff52
6 changed files with 91 additions and 83 deletions
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2
src/southbridge/amd/agesa/hudson/Makefile.inc
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@@ -16,7 +16,7 @@ romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_setup.c
ramstage-$(CONFIG_HAVE_ACPI_RESUME) += spi.c
ramstage-$(CONFIG_SPI_FLASH) += spi.c
ramstage-$(CONFIG_HAVE_ACPI_RESUME) += resume.c
romstage-y += imc.c

2
src/southbridge/amd/cimx/sb800/Makefile.inc
View File

@@ -31,7 +31,7 @@ ramstage-y += reset.c
ramstage-$(CONFIG_SB800_MANUAL_FAN_CONTROL) += fan.c
ramstage-$(CONFIG_SB800_IMC_FAN_CONTROL) += fan.c
ramstage-$(CONFIG_HAVE_ACPI_RESUME) += spi.c
ramstage-$(CONFIG_SPI_FLASH) += spi.c
ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ../../sb800/enable_usbdebug.c