diff --git a/src/mainboard/system76/rpl/variants/gaze18-3050/romstage.c b/src/mainboard/system76/rpl/variants/gaze18-3050/romstage.c
index cd767e9e22..cccff06198 100644
--- a/src/mainboard/system76/rpl/variants/gaze18-3050/romstage.c
+++ b/src/mainboard/system76/rpl/variants/gaze18-3050/romstage.c
@@ -9,7 +9,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
 	const struct mb_cfg board_cfg = {
 		.type = MEM_TYPE_DDR5,
-		.rcomp = { .resistor = 100, },
 		.ect = true,
 		.LpDdrDqDqsReTraining = 1,
 	};
diff --git a/src/mainboard/system76/rpl/variants/oryp11/romstage.c b/src/mainboard/system76/rpl/variants/oryp11/romstage.c
index 082d0cbd10..9b56345463 100644
--- a/src/mainboard/system76/rpl/variants/oryp11/romstage.c
+++ b/src/mainboard/system76/rpl/variants/oryp11/romstage.c
@@ -9,7 +9,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
 	const struct mb_cfg board_cfg = {
 		.type = MEM_TYPE_DDR5,
-		.rcomp = { .resistor = 100, },
 		.ect = true,
 		.LpDdrDqDqsReTraining = 1,
 	};