chromeos: clean up "recovery" and "write protect" GPIOs

The "write protect" GPIO's cached value is never actually
read after entering depthcharge.  Ensure the value from
get_write_protect_state() is being transferred accurately,
so that we may read this GPIO value in depthcharge without
resampling.

The cached value of the "recovery" GPIO is read only on certain
boards which have a physical recovery switch.  Correct some of
the values sent to boards which presumably never read the
previously incorrect value.  Most of these inaccuracies are from
non-inverted values on ACTIVE_LOW GPIOs.

BUG=b:124141368, b:124192753, chromium:950273
TEST=make clean && make test-abuild
BRANCH=none

Change-Id: Ic17a98768703d7098480a9233b752fe5b201bd51
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32233
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Joel Kitching
2019-04-07 00:37:14 +08:00
committed by Patrick Georgi
parent 482eec0e1b
commit ae0fb762a2
23 changed files with 51 additions and 49 deletions

View File

@@ -35,9 +35,9 @@ void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{GPIO_SPI_WP, ACTIVE_HIGH,
get_gpio(GPIO_SPI_WP), "write protect"},
get_write_protect_state(), "write protect"},
{GPIO_REC_MODE, ACTIVE_LOW,
get_recovery_mode_switch(), "recovery"},
!get_recovery_mode_switch(), "recovery"},
{-1, ACTIVE_HIGH, 1, "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},