chromeos: clean up "recovery" and "write protect" GPIOs

The "write protect" GPIO's cached value is never actually
read after entering depthcharge.  Ensure the value from
get_write_protect_state() is being transferred accurately,
so that we may read this GPIO value in depthcharge without
resampling.

The cached value of the "recovery" GPIO is read only on certain
boards which have a physical recovery switch.  Correct some of
the values sent to boards which presumably never read the
previously incorrect value.  Most of these inaccuracies are from
non-inverted values on ACTIVE_LOW GPIOs.

BUG=b:124141368, b:124192753, chromium:950273
TEST=make clean && make test-abuild
BRANCH=none

Change-Id: Ic17a98768703d7098480a9233b752fe5b201bd51
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32233
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>

src/mainboard/intel/baskingridge/chromeos.c

@@ -30,7 +30,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 {
 	struct lb_gpio chromeos_gpios[] = {
 		/* Write Protect: GPIO22 */
-		{0, ACTIVE_LOW, get_write_protect_state(), "write protect"},
+		{0, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
 
 		/* Recovery: GPIO69 - SV_DETECT - J8E3 (silkscreen: J8E2) */
 		{69, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"},