cpu/x86: move NXE and PAT accesses to paging module

The EFER and PAT MSRs are x86 architecturally defined. Therefore,
move the macro defintions to msr.h. Add 'paging' prefix to the
PAT and NXE pae/paging functions to namespace things a little better.

BUG=b:72728953

Change-Id: I1ab2c4ff827e19d5ba4e3b6eaedb3fee6aaef14d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25713
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org>

src/cpu/x86/pae/pgtbl.c

@@ -17,6 +17,7 @@
 #include <console/console.h>
 #include <cpu/cpu.h>
 #include <arch/cpu.h>
+#include <cpu/x86/msr.h>
 #include <cpu/x86/pae.h>
 #include <rules.h>
 #include <string.h>
@@ -119,3 +120,23 @@ void *map_2M_page(unsigned long page)
 	return result;
 }
 #endif
+
+void paging_set_nxe(int enable)
+{
+	msr_t msr = rdmsr(IA32_EFER);
+
+	if (enable)
+		msr.lo |= EFER_NXE;
+	else
+		msr.lo &= ~EFER_NXE;
+
+	wrmsr(IA32_EFER, msr);
+}
+
+void paging_set_pat(uint64_t pat)
+{
+	msr_t msr;
+	msr.lo = pat;
+	msr.hi = pat >> 32;
+	wrmsr(MSR_IA32_PAT, msr);
+}