cpu/x86: move NXE and PAT accesses to paging module

The EFER and PAT MSRs are x86 architecturally defined. Therefore,
move the macro defintions to msr.h. Add 'paging' prefix to the
PAT and NXE pae/paging functions to namespace things a little better.

BUG=b:72728953

Change-Id: I1ab2c4ff827e19d5ba4e3b6eaedb3fee6aaef14d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25713
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
This commit is contained in:
Aaron Durbin
2018-04-17 11:37:28 -06:00
committed by Patrick Georgi
parent 7f5e734638
commit ae18f80feb
6 changed files with 41 additions and 35 deletions

View File

@@ -1,6 +1,18 @@
#ifndef CPU_X86_MSR_H
#define CPU_X86_MSR_H
/* Intel SDM: Table 2-1
* IA-32 architectural MSR: Extended Feature Enable Register
*/
#define IA32_EFER 0xC0000080
#define EFER_NXE (1 << 11)
#define EFER_LMA (1 << 10)
#define EFER_LME (1 << 8)
#define EFER_SCE (1 << 0)
/* Page attribute type MSR */
#define MSR_IA32_PAT 0x277
#if defined(__ROMCC__)
typedef __builtin_msr_t msr_t;