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soc/intel: Introduce ioapic_get_sci_pin()

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According to ACPI Release 6.5 systems supporting PIC (i8259)
interrupt mechanism need to report IRQ vector for the SCI_INT
field. In PIC mode only IRQ0..15 are allowed hardware vectors.

This change should cover section 5.2.9 to not pass SCI_INT
larger than IRQ15. Section 5.2.15.5 needs follow-up work.

Care should be taken that ioapic_get_sci_pin() is called
after platform code has potentially changed the routing
from the default.

It appears touched all platforms except siemens/mc_aplX
currently program SCI as IRQ9.

Change-Id: I723c207f1dcbba5e6fc0452fe1dbd087fad290ee
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74326
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki
2023-04-10 16:45:39 +03:00
parent ddc37d69cb
commit ae1b2d49cf
10 changed files with 103 additions and 92 deletions
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53
src/soc/intel/baytrail/acpi.c
View File

@@ -10,7 +10,6 @@
#include <cpu/x86/msr.h>
#include <cpu/intel/turbo.h>
#include <soc/acpi.h>
#include <soc/iomap.h>
#include <soc/irq.h>
#include <soc/msr.h>
@@ -52,14 +51,21 @@ static const acpi_cstate_t cstate_map[] = {
}
};
int acpi_sci_irq(void)
static u8 soc_madt_sci_irq_polarity(u8 sci_irq)
{
if (sci_irq >= 20)
return MP_IRQ_POLARITY_LOW;
else
return MP_IRQ_POLARITY_HIGH;
}
#define ACPI_SCI_IRQ 9
void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags)
{
u32 *actl = (u32 *)(ILB_BASE_ADDRESS + ACTL);
int sci_irq = ACPI_SCI_IRQ;
int scis;
static int sci_irq;
if (sci_irq)
return sci_irq;
/* Determine how SCI is routed. */
scis = read32(actl) & SCIS_MASK;
@@ -76,13 +82,15 @@ int acpi_sci_irq(void)
sci_irq = scis - SCIS_IRQ20 + 20;
break;
default:
printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n");
sci_irq = 9;
printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ%d.\n", sci_irq);
break;
}
printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq);
return sci_irq;
*gsi = sci_irq;
*irq = (sci_irq < 16) ? sci_irq : ACPI_SCI_IRQ;
*flags = MP_IRQ_TRIGGER_LEVEL | soc_madt_sci_irq_polarity(sci_irq);
printk(BIOS_DEBUG, "SCI is IRQ %d, GSI %d\n", *irq, *gsi);
}
static acpi_tstate_t soc_tss_table[] = {
@@ -280,33 +288,14 @@ void generate_cpu_entries(const struct device *device)
acpigen_write_processor_cnot(pattrs->num_cpus);
}
static unsigned long acpi_madt_irq_overrides(unsigned long current)
{
int sci_irq = acpi_sci_irq();
acpi_madt_irqoverride_t *irqovr;
uint16_t sci_flags = MP_IRQ_TRIGGER_LEVEL;
/* INT_SRC_OVR */
irqovr = (void *)current;
current += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
if (sci_irq >= 20)
sci_flags |= MP_IRQ_POLARITY_LOW;
else
sci_flags |= MP_IRQ_POLARITY_HIGH;
irqovr = (void *)current;
current += acpi_create_madt_irqoverride(irqovr, 0, sci_irq, sci_irq, sci_flags);
return current;
}
unsigned long acpi_fill_madt(unsigned long current)
{
/* IOAPIC */
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
current = acpi_madt_irq_overrides(current);
/* INT_SRC_OVR */
current += acpi_create_madt_irqoverride((void *)current, 0, 0, 2, 0);
current += acpi_create_madt_sci_override((void *)current);
return current;
}