cpu/x86: Support CPUs without rdmsr/wrmsr instructions
Quark does not support the rdmsr and wrmsr instructions. In this case use a SOC specific routine to support the setting of the MTRRs. Migrate the code from FSP 1.1 to be x86 CPU common. Since all rdmsr/wrmsr accesses are being converted, fix the build failure for quark in lib/reg_script.c. Move the soc_msr_x routines and their depencies from romstage/mtrr.c to reg_access.c. TEST=Build and run on Galileo Gen2 Change-Id: Ibc68e696d8066fbe2322f446d8c983d3f86052ea Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15839 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
@@ -56,13 +56,6 @@ config SOC_INTEL_COMMON_LPSS_I2C_CLOCK_MHZ
|
||||
No default is set here as this is an SOC-specific value and must
|
||||
be provided by the SOC when it selects this driver.
|
||||
|
||||
config SOC_SETS_MTRRS
|
||||
bool
|
||||
default n
|
||||
help
|
||||
The SoC needs uses different access methods for reading and writing
|
||||
the MTRRs. Use SoC specific routines to handle the MTRR access.
|
||||
|
||||
config MMA
|
||||
bool "enable MMA (Memory Margin Analysis) support"
|
||||
default n
|
||||
|
Reference in New Issue
Block a user