ACPI: Separate ChromeOS NVS in ASL
For builds with MAINBOARD_HAS_CHROMEOS=y but CHROMEOS=n, there is reduced dsdt.aml size and reduced GNVS allocation from cbmem. More importantly, it's less error-prone when the OperationRegion size is not hard-coded inside the .asl files. Change-Id: I54b0d63a41561f9a5d9ebde77967e6d21ee014cd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49477 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@@ -4,23 +4,26 @@
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* the mainboard's chromeos.asl
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*/
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VBT0, 32, // 0x000 - Boot Reason
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VBT1, 32, // 0x004 - Active Main Firmware
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VBT2, 32, // 0x008 - Active EC Firmware
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VBT3, 16, // 0x00c - CHSW
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VBT4, 2048, // 0x00e - HWID
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VBT5, 512, // 0x10e - FWID
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VBT6, 512, // 0x14e - FRID
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VBT7, 32, // 0x18e - active main firmware type
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VBT8, 32, // 0x192 - Recovery Reason
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VBT9, 32, // 0x196 - FMAP base address
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CHVD, 24576, // 0x19a - VDAT space filled by verified boot
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VBTA, 32, // 0xd9a - pointer to smbios FWID
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MEHH, 256, // 0xd9e - Management Engine Hash
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RMOB, 32, // 0xdbe - RAM oops base address
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RMOL, 32, // 0xdc2 - RAM oops length
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ROVP, 32, // 0xdc6 - pointer to RO_VPD
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ROVL, 32, // 0xdca - size of RO_VPD
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RWVP, 32, // 0xdce - pointer to RW_VPD
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RWVL, 32, // 0xdd2 - size of RW_VPD
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Field (CNVS, ByteAcc, NoLock, Preserve)
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{
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VBT0, 32, // 0x000 - Boot Reason
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VBT1, 32, // 0x004 - Active Main Firmware
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VBT2, 32, // 0x008 - Active EC Firmware
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VBT3, 16, // 0x00c - CHSW
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VBT4, 2048, // 0x00e - HWID
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VBT5, 512, // 0x10e - FWID
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VBT6, 512, // 0x14e - FRID
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VBT7, 32, // 0x18e - active main firmware type
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VBT8, 32, // 0x192 - Recovery Reason
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VBT9, 32, // 0x196 - FMAP base address
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CHVD, 24576, // 0x19a - VDAT space filled by verified boot
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VBTA, 32, // 0xd9a - pointer to smbios FWID
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MEHH, 256, // 0xd9e - Management Engine Hash
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RMOB, 32, // 0xdbe - RAM oops base address
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RMOL, 32, // 0xdc2 - RAM oops length
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ROVP, 32, // 0xdc6 - pointer to RO_VPD
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ROVL, 32, // 0xdca - size of RO_VPD
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RWVP, 32, // 0xdce - pointer to RW_VPD
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RWVL, 32, // 0xdd2 - size of RW_VPD
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// 0xdd6
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}
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