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soc/intel/alderlake: Add chip config for DPA PreWake

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The FSP includes a UPD to set the DPA (Dynamic Periodicity
Alteration) PreWake value, which can be used to set the maximum
pre-wake randomization time in "micro-ticks". This patch adds
support for configuring that value.

BUG=b:228410327
TEST=build FW and checked DPA value by fsp log.

Signed-off-by: leo.chou <leo.chou@lcfc.corp-partner.google.com>
Change-Id: I08897c590a88aba058cb9e364185ea0794e1e7c3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64316
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
leo.chou
2022-05-13 10:41:03 +08:00
committed by Felix Held
parent 288f761a93
commit aef916a547
2 changed files with 8 additions and 0 deletions
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src/soc/intel/alderlake/fsp_params.c
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@@ -835,6 +835,7 @@ static void fill_fsps_acoustic_params(FSP_S_CONFIG *s_cfg,
s_cfg->AcousticNoiseMitigation = config->acoustic_noise_mitigation;
if (s_cfg->AcousticNoiseMitigation) {
s_cfg->PreWake = config->PreWake;
for (int i = 0; i < NUM_VR_DOMAINS; i++) {
s_cfg->FastPkgCRampDisable[i] = config->fast_pkg_c_ramp_disable[i];
s_cfg->SlowSlewRate[i] = config->slow_slew_rate[i];