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cpu/x86: make set_msr_bit publicly available

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Haswell and model_2065 implement a static set_msr_bit helper which
should be publicly available instead. Move it to cpu/x86.

Change-Id: I68b314c917f15fc6e5351de1c539d5a3ae646df8
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36338
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Michael Niewöhner
2019-10-25 21:37:40 +02:00
committed by Patrick Georgi
parent 9a100b5c1d
commit af1cbe2278
4 changed files with 20 additions and 53 deletions
Download Patch File Download Diff File Expand all files Collapse all files

19
src/cpu/intel/haswell/finalize.c
View File

@@ -22,25 +22,6 @@
* Document Number 504790 * Document Number 504790
* Revision 1.6.0, June 2012 */ * Revision 1.6.0, June 2012 */
#if 0
static void msr_set_bit(unsigned int reg, unsigned int bit)
{
msr_t msr = rdmsr(reg);
if (bit < 32) {
if (msr.lo & (1 << bit))
return;
msr.lo |= 1 << bit;
} else {
if (msr.hi & (1 << (bit - 32)))
return;
msr.hi |= 1 << (bit - 32);
}
wrmsr(reg, msr);
}
#endif
void intel_cpu_haswell_finalize_smm(void) void intel_cpu_haswell_finalize_smm(void)
{ {
#if 0 #if 0

17
src/cpu/intel/model_2065x/finalize.c
View File

@@ -23,23 +23,6 @@
* Document Number 504790 * Document Number 504790
* Revision 1.6.0, June 2012 */ * Revision 1.6.0, June 2012 */
static void msr_set_bit(unsigned int reg, unsigned int bit)
{
msr_t msr = rdmsr(reg);
if (bit < 32) {
if (msr.lo & (1 << bit))
return;
msr.lo |= 1 << bit;
} else {
if (msr.hi & (1 << (bit - 32)))
return;
msr.hi |= 1 << (bit - 32);
}
wrmsr(reg, msr);
}
void intel_model_2065x_finalize_smm(void) void intel_model_2065x_finalize_smm(void)
{ {
/* Lock C-State MSR */ /* Lock C-State MSR */

17
src/cpu/intel/model_206ax/finalize.c
View File

@@ -23,23 +23,6 @@
* Document Number 504790 * Document Number 504790
* Revision 1.6.0, June 2012 */ * Revision 1.6.0, June 2012 */
static void msr_set_bit(unsigned int reg, unsigned int bit)
{
msr_t msr = rdmsr(reg);
if (bit < 32) {
if (msr.lo & (1 << bit))
return;
msr.lo |= 1 << bit;
} else {
if (msr.hi & (1 << (bit - 32)))
return;
msr.hi |= 1 << (bit - 32);
}
wrmsr(reg, msr);
}
void intel_model_206ax_finalize_smm(void) void intel_model_206ax_finalize_smm(void)
{ {
/* Lock C-State MSR */ /* Lock C-State MSR */

20
src/include/cpu/x86/msr.h
View File

@@ -301,5 +301,25 @@ static inline enum mca_err_code_types mca_err_type(msr_t reg)
return MCA_ERRTYPE_UNKNOWN; return MCA_ERRTYPE_UNKNOWN;
} }
/* Helper for setting single MSR bits */
static inline void msr_set_bit(unsigned int reg, unsigned int bit)
{
msr_t msr = rdmsr(reg);
if (bit < 32) {
if (msr.lo & (1 << bit))
return;
msr.lo |= 1 << bit;
} else {
if (msr.hi & (1 << (bit - 32)))
return;
msr.hi |= 1 << (bit - 32);
}
wrmsr(reg, msr);
}
#endif /* __ASSEMBLER__ */ #endif /* __ASSEMBLER__ */
#endif /* CPU_X86_MSR_H */ #endif /* CPU_X86_MSR_H */