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soc/intel/common: Update ESPI disable option

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Update the Kconfig option for disabling ESPI SMI source
to disable it entirely, not just when ACPI mode is disabled.

For the situations where this is needed (just the sarien
board) it is better to completely stop the EC from sending
any SMI events as no actions are taken.

Change-Id: Id94481bb2f0cfc948f350be45d360bfe40ddf018
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31918
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Duncan Laurie
2019-03-15 17:13:15 -07:00
committed by Patrick Georgi
parent c563cf3030
commit af39c82a36
4 changed files with 10 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/google/sarien/Kconfig
View File

@ -18,7 +18,7 @@ config BOARD_GOOGLE_BASEBOARD_SARIEN
select SOC_INTEL_COMMON_ACPI_EC_PTS_WAK select SOC_INTEL_COMMON_ACPI_EC_PTS_WAK
select SOC_INTEL_WHISKEYLAKE select SOC_INTEL_WHISKEYLAKE
select SOC_INTEL_COMMON_BLOCK_HDA_VERB select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select SOC_INTEL_COMMON_BLOCK_SMM_ESPI_ACPI_DIS select SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE
select SPD_READ_BY_WORD select SPD_READ_BY_WORD
select SYSTEM_TYPE_LAPTOP if BOARD_GOOGLE_SARIEN select SYSTEM_TYPE_LAPTOP if BOARD_GOOGLE_SARIEN
select SYSTEM_TYPE_CONVERTIBLE if BOARD_GOOGLE_ARCADA select SYSTEM_TYPE_CONVERTIBLE if BOARD_GOOGLE_ARCADA

7
src/soc/intel/common/block/smm/Kconfig
View File

@ -8,13 +8,12 @@ config SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
help help
Intel Processor trap flag if it is supported Intel Processor trap flag if it is supported
config SOC_INTEL_COMMON_BLOCK_SMM_ESPI_ACPI_DIS config SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE
bool bool
default n default n
help help
Disable eSPI SMI when ACPI mode is enabled. This will Disable eSPI SMI source to prevent the embedded controller
prevent the embedded controller from asserting SMI when from asserting SMI while in firmware.
booted into an ACPI aware OS.
config SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS config SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS
int int

4
src/soc/intel/common/block/smm/smihandler.c
View File

@ -361,14 +361,10 @@ void smihandler_southbridge_apmc(
break; break;
case APM_CNT_ACPI_DISABLE: case APM_CNT_ACPI_DISABLE:
pmc_disable_pm1_control(SCI_EN); pmc_disable_pm1_control(SCI_EN);
if (CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_ESPI_ACPI_DIS))
pmc_enable_smi(ESPI_SMI_EN);
printk(BIOS_DEBUG, "SMI#: ACPI disabled.\n"); printk(BIOS_DEBUG, "SMI#: ACPI disabled.\n");
break; break;
case APM_CNT_ACPI_ENABLE: case APM_CNT_ACPI_ENABLE:
pmc_enable_pm1_control(SCI_EN); pmc_enable_pm1_control(SCI_EN);
if (CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_ESPI_ACPI_DIS))
pmc_disable_smi(ESPI_SMI_EN);
printk(BIOS_DEBUG, "SMI#: ACPI enabled.\n"); printk(BIOS_DEBUG, "SMI#: ACPI enabled.\n");
break; break;
case APM_CNT_GNVS_UPDATE: case APM_CNT_GNVS_UPDATE:

16
src/soc/intel/common/block/smm/smm.c
View File

@ -41,6 +41,8 @@ void smm_southbridge_clear_state(void)
void smm_southbridge_enable(uint16_t pm1_events) void smm_southbridge_enable(uint16_t pm1_events)
{ {
uint32_t smi_params = ENABLE_SMI_PARAMS;
printk(BIOS_DEBUG, "Enabling SMIs.\n"); printk(BIOS_DEBUG, "Enabling SMIs.\n");
/* Configure events */ /* Configure events */
pmc_enable_pm1(pm1_events); pmc_enable_pm1(pm1_events);
@ -60,14 +62,16 @@ void smm_southbridge_enable(uint16_t pm1_events)
* - on APMC writes (io 0xb2) * - on APMC writes (io 0xb2)
* - on writes to SLP_EN (sleep states) * - on writes to SLP_EN (sleep states)
* - on writes to GBL_RLS (bios commands) * - on writes to GBL_RLS (bios commands)
* - on eSPI events (does nothing on LPC systems) * - on eSPI events, unless disabled (does nothing on LPC systems)
* No SMIs: * No SMIs:
* - on microcontroller writes (io 0x62/0x66) * - on microcontroller writes (io 0x62/0x66)
* - on TCO events * - on TCO events
*/ */
if (CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE))
smi_params &= ~ESPI_SMI_EN;
/* Enable SMI generation: */ /* Enable SMI generation: */
pmc_enable_smi(ENABLE_SMI_PARAMS); pmc_enable_smi(smi_params);
} }
void smm_setup_structures(void *gnvs, void *tcg, void *smi1) void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
@ -94,11 +98,3 @@ void smm_region_info(void **start, size_t *size)
*start = (void *)sa_get_tseg_base(); *start = (void *)sa_get_tseg_base();
*size = sa_get_tseg_size(); *size = sa_get_tseg_size();
} }
#if CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_ESPI_ACPI_DIS)
static void smm_disable_espi(void *dest)
{
pmc_disable_smi(ESPI_SMI_EN);
}
BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, smm_disable_espi, NULL);
#endif