sb/intel: Use bool
for PCIe coalescing option
Retype the `pcie_port_coalesce` devicetree options and related variables to better reflect their bivalue (boolean) nature. Change-Id: I6a4dfe277a8f83a9eb58515fc4eaa2fee0747ddb Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60416 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
@@ -38,7 +38,7 @@ chip soc/intel/broadwell
|
||||
register "pcie_port_force_aspm" = "0x10"
|
||||
|
||||
# Enable port coalescing
|
||||
register "pcie_port_coalesce" = "1"
|
||||
register "pcie_port_coalesce" = "true"
|
||||
|
||||
# Disable PCIe CLKOUT 1,5 and CLKOUT_XDP
|
||||
register "icc_clock_disable" = "0x01220000"
|
||||
|
Reference in New Issue
Block a user