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sb/intel: Use bool for PCIe coalescing option

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Retype the `pcie_port_coalesce` devicetree options and related variables
to better reflect their bivalue (boolean) nature.

Change-Id: I6a4dfe277a8f83a9eb58515fc4eaa2fee0747ddb
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60416
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons
2021-12-28 13:05:56 +01:00
committed by Felix Held
parent 0b9d186e3d
commit af4bd5633d
42 changed files with 50 additions and 49 deletions
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src/mainboard/google/parrot/devicetree.cb
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@@ -54,7 +54,7 @@ chip northbridge/intel/sandybridge
register "gen2_dec" = "0x00040069"
# Enable zero-based linear PCIe root port functions
register "pcie_port_coalesce" = "1"
register "pcie_port_coalesce" = "true"
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2